Self-Improving Computers: Speeding up Programs by Dynamically Moving them to FPGAs

Frank Vahid
UC Riverside

Monday, January 14, 2008 at 1:00PM

54-134 Engineering IV Building
Refreshments Served

Abstract: What would you say about a car that could dynamically replace its own engine based on how the car was currently being driven, using a sporty engine for local driving, and then a big truck engine when carrying a heavy load? Great, but impossible of course -- a car can't carry around spare engines. But in the amazing new world of billion-transistor chips, computers can actually achieve a similar form of self- improvement. Since 2002, UCR researchers have been developing a technology, known as "Warp Processing," in which the execution of a program on a microprocessor is automatically replaced by execution on an FPGA, using a circuit custom-designed on-the-fly for the program's specific needs, resulting in transparent performance improvement, or "warping." That improvement isn't just 20% or 30%, but is often 10x, 100x, or even 1000x. We provide background on FPGAs (Field Programmable Gate Arrays) and on partitioning programs among microprocessors and FPGAs, present the basics of warp processing ("dynamic" partitioning), discuss its key underlying technologies, and highlight results, including very recent results for multi-threaded programs.

Biography: Frank Vahid is a Professor of Computer Science and Engineering at the University of California, Riverside; Chair of the Faculty of Engineering at UCR; and Associate Director of the Center for Embedded Computer Systems at UC Irvine. He received a B.S. in Computer Engineering from the University of Illinois in 1988 graduating with highest honors, and M.S. and Ph.D. degrees from the University of California, Irvine in 1990 and 1994, respectively, where he was an SRC Fellow. Since 1990, he has co-authored over 120 conference and journal papers, including the best paper award from IEEE Transactions on VLSI in 2000, a DATE conference best paper award, and a DAC conference best paper nomination. He is co-author of the textbooks "Digital Design," "VHDL for Digital Design," "Verilog for Digital Design," and "Embedded System Design" (John Wiley and Sons 2006, 2007, 2007, and 2001, respectively)) and of "Specification and Design of Embedded Systems (Prentice Hall, 1994) He received the Outstanding Teacher of the UCR College of Engineering award in 1997 and the College's Teaching Excellence Award in 2003. He was program and general chair for the IEEE/ACM International Symposium on System Synthesis in 1996 and 1997, respectively, and for the IEEE/ACM International Workshop on Hardware/Software Codesign in 1999 and 2000, and has served on the Steering Committee of Embedded Systems Week since its inception. He has worked as an engineer for Hewlett-Packard and for AMCC, and has consulted for Motorola and NEC, among other companies. His research is or has been supported by the U.S. National Science Foundation, the Semiconductor Research Corporation, Philips, Motorola, Xilinx, TriMedia, and NEC, among others. His research emphasizes highly novel self-adapting compute architectures, and creating a generation of electronic sensor blocks that non-experts and experts alike can easily compose to build basic useful sensor-based systems. His teaching emphasis includes seeking to motivate students to build innovative new systems that improve the human condition.