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A 2.4-GHz Wideband Open-Loop Phase Modulator with Phase Quantization Noise Cancellation
| What |
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| When |
Nov 16, 2010 from 03:00 PM to 04:00 PM |
| Where | Engr. IV Maxwell Room 57-124 |
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Pin-En Su
Advisor: Sudhakar Pamarti
Tuesday, November 16, 2010 at 3:00pm
Engr. IV Maxwell Room 57-124
Abstract:
Wide bandwidth phase modulator is one of the fundamental building blocks
for low power wireless transmitter architectures, such as polar
transmitter or out-phasing transmitter. Lower power consumption is
achieved because instead of linear power amplifiers (PA), they adopt
nonlinear PAs where no back-off operation is required. However,
currently the adaptation of these architectures is limited to narrowband
communication systems due to the difficulty of generating a wide enough
phase modulation signal. For example, in existing polar transmitter
applications, state of the art phase modulators have a bandwidth no
greater than 2-MHz, which is just enough for narrowband systems such as
EDGE. Another prior art uses an open-loop modulation technique to
achieve a 6-MHz phase modulation bandwidth, but at the penalty of very
high (about -25-dBr) phase quantization noise.
In this research, we propose an open-loop wide bandwidth phase modulator with a phase quantization noise cancellation technique. The open-loop modulation is achieved outside the PLL, so the modulation bandwidth is not limited by the PLL loop bandwidth and can be very wide. A 2.4-GHz phase modulator prototype is implemented in TSMC 0.18- m CMOS technology. The proposed phase quantization noise cancellation technique effectively reduce the peak out-of-band noise by 7-dB so that the measured peak out-of-band phase noise is -49-dBr when transmitting a 20-Mb/s GFSK signal with 3.2% r.m.s. error. The current consumption for the transmitter excluding the output buffer is 34.5-mA under 1.8V supply voltage. Since a big portion of the transmitter is digital, lower current consumption can be expected when migrating to a more advanced technology.
Biography:
Pin-En Su was born in Taipei, Taiwan. He received the B.S. degree in
electrical engineering and the M.S. degree in communication engineering
from National Taiwan University in 1999 and 2001, respectively. He
joined SoC Technology Center (STC), Industrial Technology Research
Institute (ITRI), Hsinchu, Taiwan in 2001 and worked on GPRS/WCDMA
transmitter RFIC design. Since 2006, he joined the electrical
engineering Ph.D. program at UCLA. His research interests are in the
area of wireless transmitters and frequency synthesizers.
