Analysis and Design of High-Efficiency Multi-Mode RF Polar Transmitters

Michael Youssef
Advisor: Asad Abidi

Monday, November 1, 2010 at 12:00pm
Engr. IV Faraday Room 67-124

Abstract:
Wireless communications are evolving at an ever-increasing rate. Systems such as GSM and EDGE are being augmented with WCDMA and HSPA capabilities, making a power- and cost-efficient multi-mode solution essential. The RF transmitter is a key ingredient of any multi-mode solution whose design presents several challenges that are drastically magnified when distinctly different modes must be hosted.

Until recently, all mainstream multi-mode transmitters have been using a dual path architecture with a narrow-band polar modulator for GSM/EDGE and a wideband linear modulator for WCDMA/HSPA. This solution has proven to be the only method to achieve acceptable performance despite being complex and suboptimal for area and power consumption. To address the complexity issues associated with such an architecture, recent publications have rolled back to the I-Q up-conversion transmitter to support all modes. This method, albeit versatile, suffers from the need to calibrate imbalance in its quadrature branches and DC offset at its inputs, remains vulnerable to the up-converter mixer noise, and consumes more power and chip area than is warranted.

Another versatile solution would be to extend the polar modulation to all modes. This is more attractive owing to the better spectral purity of the polar modulator, the simpleness of its LO chain, and the higher power efficiency of its pre-PA driver. A single path for all modes makes it also area efficient. Even so, this solution is not without its own set of challenges: Increased modulation bandwidths demand even wider phase modulation (PM) bandwidths and tighter delay mismatch between the amplitude modulation (AM) and PM components of the signal. Whereas EDGE requires a PM bandwidth around 800 kHz and can tolerate AM/PM delay mismatch on the order of 10's of nanoseconds, WCDMA needs at least an 8 MHz bandwidth with path delay mismatch less than 2 ns.

This dissertation presents a versatile, largely self-calibrated polar transmitter with new circuits that addresses the above-mentioned challenges. The radio re-invents the well-known two-point modulation phase-locked loop (PLL) by injecting a second input into a linearized and accurately-controlled Voltage-Controlled Oscillator (VCO). This guarantees precise matching of the gains of the two modulation paths and satisfactory out-of-band performance. The linear, well-controlled VCO characteristic is obtained by means of negative feedback: A switched-capacitor-based frequency-locked loop (FLL), with negligible area and power dissipation overhead, nested inside the PLL sets the VCO gain accurately across the range of the input tuning voltage as well as over process, voltage, temperature, and operating frequency corners. Controlling the bandwidth of the FLL and using matched digital-to-analog converters and reconstruction filters in the AM and PM paths guarantees near-perfect alignment between these two signal components when they combine at the power amplifier driver.

A prototype was fabricated in 65nm CMOS and was measured with WCDMA and EDGE signals. It meets the 3GPP specifications with wide margins: In WCDMA mode, the ACLR at 5/10 MHz offsets is -42/-58 dBc, noise at 45 MHz offset is -159 dBc/Hz, and EVM at 0 dBm output power is 2.9%. The transmitter, including the VCO, LO chain, PLL, FLL, and PA driver draws 40 mA from the battery, of which the FLL takes only 1.5 mA. The DG09 current consumption is 25 mA. At 1 dBm output power, the transmitter's EDGE modulation spectrum is down by -61 dBc at 400 kHz and the EVM is 2.4% at 32 mA of battery current. Where direct up-conversion transmitters would require extensive calibration, the measured as- is LO leakage of this device is -55 dBc and scales favorably with gain control.

The transmitter presented in this dissertation provides a power-efficient, low-cost solution to the multi-mode challenge. It achieves a single path for modulation with enough flexibility to adapt to very different signals. Extending this architecture further presents a tremendous opportunity that, in some ways, enables future systems.

Biography:
Michael Youssef received the B.S. and M.S. degrees in electrical engineering from Ain Shams University, Cairo, Egypt, in 2001 and 2005, respectively. Since 2005, he has been with the University of California, Los Angeles, where he is working towards the Ph.D. degree. His interests include analog and RF IC design for wireless communications.