Personal tools
Home Events Events Archive 2012 A Zero Voltage Switching Contour based Power Amplifier for Minimal Efficiency Degradation under Power Back-Off

A Zero Voltage Switching Contour based Power Amplifier for Minimal Efficiency Degradation under Power Back-Off

— filed under:

  • PhD Defenses
When Nov 18, 2011
from 04:00 PM to 05:00 PM
Where Maxwell Room, Engr. IV 57-124
Add event to calendar vCal

Nitesh Singhal

Advisor: Sudhakar Pamarti



Power amplifiers are one of the most power consuming blocks in any wireless communication system. As modern wireless technologies increasingly use non-constant envelope modulation schemes with large Peak to Average ratios (PAR), designing power amplifiers that can maintain high efficiency over the dynamic range of such modulation schemes and also achieve power control becomes critical. Maintaining high efficiency under output power back-off decreases the operational costs of a transmitter by increasing the battery life and decreasing heat dissipation. Advances in linear and switching amplifier architectures have increased the efficiency of power
amplifiers. In spite of all these advances the efficiency degradation with output power back-off of almost all the prevalent power amplifier architectures remains poor.

A Zero Voltage Switching Contour PA technique which can theoretically maintain 100% efficiency at all power levels is presented. The technique uses a switching class E amplifier to achieve high efficiency by maintaining Zero Voltage Switching (ZVS) conditions, essential to achieving high efficiency at RF frequencies, at the peak output power. The scheme further employs a combination of duty cycle modulation and dynamic load modulation in concert so as preserve ZVS conditions and ideally 100% efficiency at all power levels. Measurement results on a prototype 130nm CMOS IC as well as on a PA built using discrete components showing that high efficiency can be maintained for 6-9dB back-off in output power are also presented. Measurement results show that the dynamic losses in the PA while generating 4dB PAR 20Msps Offset QPSK signal are also minimal. A theoretical analysis of all the losses in the PA corroborating the measurement results is also presented. The talk also discusses a pre-distortion scheme which helps in improving the linearity of the PA by mitigating any static AM-AM and AM-PM distortion. The talk also elaborates upon dynamic range extension techniques which can extend the output power dynamic range of the proposed PA thus making it suitable for high PAR applications like WLAN/WIMAX etc. Measurement results on a discrete prototype confirm that the range extension techniques can extend the dynamic range of the proposed PA to 30 dB.


Nitesh Singhal is a Ph.D. candidate in the Electrical Engineering department at UCLA. He received his Bachelors and Masters in Technology degree from Indian Institute of Technology, Kharagpur, India in 2005. He received the Academic Excellence Award from the Senate IIT Kharagpur in 2005. He joined UCLA as a PhD student in 2005. He received the UCLA Electrical Engineering Fellowship in 2009-10 and the Graduate Fellowship from the EE Department at UCLA in 2005-06 and 2009-10. He has authored several research papers and patents on his research on power amplifiers. He is mostly interested in wireless communication system hardware, especially RF and mixed-signal circuit blocks such as RF transmitters. His area of research is primarily applying digital techniques in mixed signal and RF circuits, focusing on finding novel ways of dealing with circuit non-idealities.

Document Actions