Absorbing Set Analysis of LDPC Codes and Read-Channel Quantization in Flash Memory
Mar 09, 2012
from 02:00 PM to 04:00 PM
|Where||ENGR. IV Bldg. 47-124|
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Advisor: Richard Wesel
High-capacity NAND flash memories achieve high-density by storing more than one bit per cell. Storage systems require extremely low block-error-rates, making powerful error-correcting codes with low-error floors necessary. Low-density parity-check (LDPC) codes are well known to approach the capacity of the additive white Gaussian noise (AWGN) channel, but they often suffer from error floors and require soft information to achieve better performance.
This defense tackles these two problems by first introducing the cycle consistency matrix (CCM) as a powerful analytical tool for characterizing and avoiding absorbing sets in a class of quasi-cyclic LDPC codes. With the CCM approach, we can systematically and provably eliminate dominant absorbing sets and lower the error floor. This defense then shows the benefit of using soft information for the LDPC decoder in the context of flash memories by performing multiple cell reads with distinct word-line voltages. The word-line voltages are optimized by maximizing the mutual information between the input and output of the multiple-read channel. The resulting quantization in the LDPC decoder provides an effective and efficient estimate of the word-line voltages compared to other existing quantization techniques.
Jiadong Wang received his B.S. degree in Automation from Tsinghua University, Beijing, China in 2007, the M.S. degree in Electrical Engineering from UCLA in 2008, and is currently pursuing his Ph.D. there. Since 2007, he has been a research assistant in the Communication Systems Laboratory (CSL) under the mentorship of Professor Richard D. Wesel. His research is in the area of communication theory with a focus on channel coding. He has worked on a broad range of research topics including LDPC codes and turbo codes with applications ranging from flash memory to broadcast channels.