Signal Processing Techniques Enabling Wideband A/D Converters
Sep 09, 2013
from 02:00 PM to 04:00 PM
|Where||Engr. IV Bldg, Maxwell Room 57-124|
|Contact Name||Abhishek Ghosh|
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Advisor: Professor Sudhakar Pamarti
With an ever-widening signal spectrum and incorporation of multiple standards that share the available spectrum at the same time, research towards building wideband analog-to-digital converters (ADCs) has gained significant momentum. Furthermore, with an aim to improve spectral efficiency, increasingly complex modulation schemes are being invoked having high peak-to-average ratios, the latter translating to high dynamic ranges for the received signals. Consequently, the ADCs deployed in these receivers need to be of quite high precision as well. With these two primary goals for ADCs (high bandwidth, high resolution) in mind, this talk presents a few different techniques for achieving them.
In the first part of the talk, a digital-signal conditioning technique (using subtractive dither) is developed to mitigate quantizer non-linearity that provides a stepping-stone for high-resolution ADCs. The effects of filtering the dither signal to shape its spectral content outside the signal band while maintaining its benefits are studied in detail. Design strategies for finite impulse response (FIR) filters that accomplish spectral shaping as well as allay quantizer non-linearity are derived theoretically.
In the second part of this talk, the proposed dithering technique is used for linearizing VCO-based ADCs. The proposed technique conditions the signal to the VCO input to appear as white noise thereby eliminating spurious signal content arising out of the VCO nonlinearity. A prototype implementation (in 65nm CMOS) based on the technique achieves 10-b ENOB in digitizing signals with 50MHz bandwidth (FoM=90fJ/conv.step).
In the third part of this talk, a very popular technique of bandwidth enhancement through time-interleaving multiple ADCs is examined. Time-interleaved A/D converters enable high conversion bandwidths with quite high precisions. However, inevitable mismatch errors typical of any integrated circuit fabrication process degrades the achievable dynamic range of such A/D converters. An adaptive signal-conditioning technique to combat such mismatch-induced errors at a minimal hardware expense is proposed. Simulation results substantiating the claims and thorough analyses of the technique are subsequently presented to highlight the efficacy of the technique.
Abhishek Ghosh was born in Calcutta, India. He received his Bachelors in Technology and Master of Science from Indian Institute of Technology, Kharagpur, India and University of California, Los Angeles (UCLA) in 2007 and 2010 respectively and is working towards his doctoral degree at UCLA. His research interests are communication theory and signal processing algorithms for mixed-signal, RF and analog circuit design.