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Carbon Nanotube Computer: Transforming Scientific Discoveries into Working Systems

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What
  • Seminar Series
When Mar 03, 2014
from 12:30 PM to 02:00 PM
Where Engr. IV Bldg., Shannon Room 54-134
Contact Name
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Prof. Subhasish Mitra

Stanford


Abstract

Carbon Nanotube Field Effect Transistors (CNFETs) are excellent candidates for building highly energy-efficient future electronic systems. Unfortunately, carbon nanotubes (CNTs) are subject to substantial inherent imperfections that pose major obstacles to the design of robust and very large-scale CNFET digital systems:

• It is nearly impossible to guarantee perfect alignment and positioning of all CNTs. This limitation introduces stray conducting paths, resulting in incorrect circuit functionality. 

• CNTs can be metallic or semiconducting depending on chirality. Metallic CNTs result in excessive leakage and incorrect circuit functionality.

A combination of design and processing techniques overcomes these challenges by creating robust CNFET digital circuits that are immune to these inherent imperfections. This imperfection-immune design paradigm enables the first experimental demonstration of the carbon nanotube computer, and, more generally, arbitrary digital systems that can be built using CNFETs. Monolithically-integrated three-dimensional CNFET circuits will also be discussed.  This research was performed at Stanford University in collaboration with Prof. H.-S. Philip Wong and several graduate students.

 

Biography

Professor Subhasish Mitra directs the Robust Systems Group in the Department of Electrical Engineering and the Department of Computer Science of Stanford University, where he is the Chambers Faculty Scholar of Engineering. Prior to joining Stanford, he was a Principal Engineer at Intel Corporation. His research interests include robust system design, VLSI design, CAD, validation and test, and emerging nanotechnologies.  

Prof. Mitra's major honors include the Presidential Early Career Award for Scientists and Engineers from the White House, the IEEE CAS/CEDA Pederson Award, and the Intel Achievement Award, Intel’s highest corporate honor.  He and his students published several award-winning papers at major venues: IEEE/ACM Design Automation Conference, IEEE International Solid-State Circuits Conference, IEEE International Test Conference, IEEE Transactions on CAD, IEEE VLSI Test Symposium, Intel Design and Test Technology Conference, and the Symposium on VLSI Technology. 

Prof. Mitra has served on numerous conference committees and journal editorial boards. Recently, he served on DARPA's Information Science and Technology Board as an invited member. He is a Fellow of the IEEE.

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