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From Tera-scale communication to Lab-in-the-body: Challenges and Opportunities for CMOS technology

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  • Visitor Seminars
When Apr 01, 2014
from 11:00 AM to 12:30 PM
Where Engr. IV Bldg., Shannon Room 54-134
Contact Name
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Meisam Nazari

California Institute of Technology


Over the past couple of decades we have witnessed a tremendous growth in computational capability owing to the rapid advances in CMOS technology. Exa-scale high-performance computing systems are projected to become a reality soon. With this increase in the computation, a corresponding scaling in data communication bandwidth is inevitable. The limited bandwidth of the current physical channels not only limits the communication between chip microprocessors (CMP), it also imposes serious problem for on-chip interconnection. Different techniques have been employed to bridge this gap between interconnect and CMPs bandwidth, such as 3D integration and optical signaling. In the first part of my talk, I will go over new circuit techniques that enable massively parallel electrical and optical communication to address the bandwidth requirement of the future processing systems.

Combining the high level of integration offered by CMOS and micro/nanofabrication technology enables complex and compact sensing systems. During the second part of the presentation, the opportunities for integrated microsystems for implantable health monitors will be explored. The combination of power and data telemetry and physiological sensors within small chips enables us to contemplate new microsystems for healthcare monitoring, closed loop therapy and remote management of patients. Such systems could be implanted as continuous glucose monitors (CGM), neural prosthetics and other physiological measurement tools and will enable a new class of continuous digital health monitors that leads to preventative healthcare at lower cost. As an example of such systems, I will present my research on implantable CGM microsystems and a retinal prosthesis.


Meisam Nazari received the M.S. and Ph.D. degrees in electrical engineering from California Institute of Technology, Pasadena in 2009 and 2013, respectively. He is currently a Post-doctoral Scholar in the department of electrical engineering at California Institute of Technology. In summer 2011, he held an internship at Rambus Inc. Laboratory. His research interests include high-performance mixed-signal integrated circuits, with the focus on biomedical circuits and systems as well as high-speed and low-power optical and electrical interconnects. He is the recipient of 2008 Brian L. Barge Award for excellence in microsystems integration, 2010 AMD/CICC Student Scholarship Award, the 2012 Solid-State Circuits Society Pre-doctoral Achievement Award, and the 2012 Circuits and Systems Society Pre-doctoral Scholarship. He is also an NVIDIA 2012 graduate fellowship finalist. He is the Silver medal winner of the Iranian National Chemistry Olympiad in 2000.

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