CMOS Transceivers for the 60-GHz Band

Professor Behzad Razavi, Director
The Communications Circuits Laboratory

The unlicensed band around 60 GHz presents the possibility of short-range communications at high data rates. The anticipated complexity of transceivers designed for operation in this band makes the use of CMOS technology attractive, especially if techniques such as beamforming and multiple-input-multiple-output (MIMO) signaling are considered.

Today's development of 60-GHz CMOS transceivers is reminiscent of the challenges that faced 5-GHz CMOS wireless LAN circuits in the mid-1990s: the intrinsic speed of the then-available transistors was inadequate, and no significant commercial value had been identified. Nonetheless, if 60-GHz transceivers follow the fate of their 5-GHz counterparts, both of these issues will be resolved in the near future. Another critical attribute of communication at 60 GHz is the small wavelength and hence the possibility to integrate the antenna on-chip. While somewhat lossy, onchip antennas offer several significant benefits. They (1) obviate the need for expensive and lossy millimeter-wave packaging, (2) lend themselves to differential operation, transmitting a greater power for a given voltage swing, and (3) eliminate lossy ESD protection devices.

Additionally, the receive and transmit paths can incorporate separate antennas to avoid the use of lossy transmit/receiver switches, and the transmitter need not be AC-coupled to the antenna. Finally, the antennas can serve in a beamforming array, raising the output power. This last property is particularly important because, with the low supply voltage of deep-submicron devices, it is much simpler to construct a multitude of low-power transmitters than one high-power counterpart.

The research on 60-GHz CMOS transceivers at UCLA has, in its first phase, concentrated on critical building blocks such as receiver and transmitter front ends and frequency dividers. Using new circuit topologies, the performance of these blocks is pushed to 60 GHz in 0.13-um CMOS technology. Shown above are the die photograph of the transmitter front end with an integrated dipole antenna and the circuit diagram of the 60-GHz frequency divider. The second phase aims toward higher levels of integration of these functions in 90-nm CMOS.