DAVID HWANG

My dissertation research was focused on system architectures and VLSI implementations of secure embedded systems. My broad research interests lie in embedded systems, digital IC design, security, and signal processing. Some of my current research topics include:

Security and Cryptographic Hardware for Resource-Constrained Embedded Devices

My current research is concerned with implementations of security on resource-constrained devices. A system can be considered resource-constrained if it has severe limitations in terms of memory, energy, processing power, bandwidth, etc. in comparison to powerful systems such as workstations and servers. Some definitive examples of such devices are wireless sensor nodes and smart cards.

At the system level, I have performed research in low-power security mechanisms for distributed embedded systems. At the architecture and hardware level, I am currently researching low-power implementations of security algorithms on resource-constrained devices, with and without coprocessor acceleration.

My research also concerns the design of portable devices that would authenticate users by means of on-device cryptography and biometrics, thus eliminating a variety of security and privacy problems. Instead of relying on passwords or signatures to verify identity, users of the device (meant to hang on one's keychain) would use thumbprints for authentication. The device is called ThumbPod, and is unique because it is designed for security at all levels of abstraction, from the protocol level down to the circuit level.

First Generation - FPGA Implementation. A first-generation ThumbPod has been designed and demonstrated on a reconfigurable platform. The application consists of a suite of authentication protocols in Java coupled with fingerprint signal processing routines in C. The hardware architecture consists of a Xilinx Virtex-II FPGA (housing a 32-bit LEON2 softcore processor, an AES crypto-coprocessor, and a DFT hardware accelerator) together with a CMOS fingerprint image sensor and Bluetooth wireless transceiver. Thumbpod won an Honorable Mention Award at the 2003 DAC (Design Automation Conference) Student Design Contest in June 2003 and has also garnered attention in the press.

Second Generation - ASIC Implementation. My research also concerns the VLSI design of a second-generation ThumbPod, which encapsulates ThumbPod as a secure coprocessor ASIC. The ASIC consists of a high-throughput symmetric-key AES encryption core with CBC-MAC and OFB feedback modes, a novel biometric fingerprint match-on-chip processor with template storage, and a secure controller to monitor illegal instructions and combat software attacks. The chip is protected from side-channel attacks by a new DPA (differential power analysis) proof circuit technique developed by fellow researcher Kris Tiri. The ASIC was fabricated in a 0.18-um, 1.8-V TSMC CMOS technology and won the Third Place Award at he 2005 DAC (Design Automation Conference) Student Design Contest in June 2005.

This project involved the implementation of signal processing applications on tool-flowed ASIC and DSP platforms. A fine example of an algorithm that is suitable for DSPs is the LPC speech codec. We discovered that the power consumption of an ASIC design for the LPC coder is 4x less than the same on a dedicated DSP. This work was initially presented at 2001 ICASSP and an expanded version can be found in the book in the publications section.

Much of my former research and current focus in industry involves the design and implementation of DSP architectures for high-speed digital communications. Such work includes considerations of coordinate conversion, filter banks for digital receivers, direct digital frequency synthesis, high-speed equalizers, and digital transceiver front-ends.