Lectures EE201A - Ingrid Verbauwhede

Lecture 1

• Course Outline (PDF file)
• Motivation slides (PDF file)
• Reference: W.Strauss, "Digital Signal Processing, the New Semiconductor Industry Technology Driver," IEEE Signal Processing Magazine, pg. 52-56, March 2000. (PDF file)

Lecture 2

• Architecture exploration: decision trees (PDF file)
• Reference: F. Catthoor, "Integrated Systems for Real-Time Digital Signal Processing,"
  Chapter 2 (PDF file) Chapter 3 -Part 1 (PDF file)

Lecture 3

• Time multiplexing: bitserial - wordserial (PDF file)
• Reference: F. Catthoor, "Integrated Systems for Real-Time Digital Signal Processing," Chapter 3 -Part 2 (PDF file)

Lecture 4

• Time multiplexing: wordserial (PDF file)
• Class presentation by Michael Chou and Scott Siegrist: JPEG introduction (PDF file)

Lecture 5

• Modeling: Synchronous data flow graphs (PDF file)
  Reference: E.A. Lee, D. Messerschmitt, "Synchronous data flow," Proceedings of the IEEE, Vol. 75, no.9, Sept. 1987.
• Class presentation by Alireza Hodjat and Bo Chen Lai: SpecC (PDF file)

Lecture 6

• Invited speaker, Doug Johnson from Adelante Technologies "DSP Co-Processor Design using AR|T designer" (PDF file)

Lecture 7

• Memory management: foreground memory (PDF file)
  Reference: P.R. Panda, F. Catthoor, N.D. Dutt, et al., "Data and Memory Optimization Techniques for Embedded Systems," ACM Transactions on Design Automation of Electronic Systems, Vol. 6, No. 2, April 2001, pg. 149-206.
• Class presentation by Pete Sungha Kim and Yi Fan:
  Reference: W. Verhaegh, et al. "A Two-Stage approach to Multidimensional Periodic scheduling," IEEE Transactions on CAD, Vol. 20, No. 10, October 2001, (PDF file of Journal paper)

Lecture 8

• Memory management: continue - modeling of streams (Phideo) (PDF file)
• Class presentation by Heemin Park and Arun A. Somasundara: "memory management in Media Processing," (PDF file)
  Reference: B. Khailany et al., "Imagine: Media processing with streams" IEEE Micro, pg. 35-46, March-April 2001.

Lecture 9

• Memory management: continue - modeling of arrays (PDF file)
• Class presentation by Hanish Rathod and Rupesh Goel: Memory allocation and assignment (PDF file)
  Reference: F. Catthoor, et al.: "Custom Memory Management Methodology: Exploration of Memory organization for Embedded Multimedia System Design," Chapter 10, pg. 201-205, Chapter 11, pg. 233-256.

Lecture 10

• Class discussion on JPEG project
• Class presentation by Raghu Rao and Jatin Bhatia: Fixed point arithmetic (PDF file)

Lecture 11

• Memory management: data/control and data reuse transformations (PDF file)
• Class presentation by Shiva Navab and Young Cho: Address generation (version 1) (version 2)
  References:
  D. Grant, P. Denyer, "Address generation for array access based on modulus m counters," European Design Automation Conference, Feb. 1991.
  

Lecture 12

• DSP Processors: fundamentals (PDF file)
  Reference: E.A. Lee, "Programmable DSP Architectures: Part I", IEEE ASSP Magazine, Oct. 1988, pg. 4-19. (PDF file).
  Reference: E.A. Lee, "Programmable DSP Architectures: Part II", IEEE ASSP Magazine, Jan. 1989, pg. 4-14. (PDF file).
• Class presentation by Eric Kwan and Sandeep Vardhan: DSP's are market drivers (PDF file)
  Reference: A. Gatherer, T. Stetzler, M. McMahan, E. Auslander, "DSP-Based Architectures for Mobile Communications: Past, Present and Future" IEEE Communications Magazine, January 2000, pg. 84-90. (PDF file).

Lecture 13

• Invited presentation: Daryl Lee Specter, from Insight on XILINX FPGA architectures and EDA tools

Lecture 13bis

• Invited presentation by professor Bart Kienhuis of Leiden University on Compaan
  Slide set at UCLA PDF file

Lecture 14

• DSP Processors: fundamentals - Part II (PDF file)
  Reference: E.A. Lee, "Programmable DSP Architectures: Part I", IEEE ASSP Magazine, Oct. 1988, pg. 4-19. (PDF file).
  Reference: E.A. Lee, "Programmable DSP Architectures: Part II", IEEE ASSP Magazine, Jan. 1989, pg. 4-14. (PDF file).
• No class presentation

Lecture 14 bis

• Faculty candidate John Owens - Monday May 20, 2002, 3pm to 4pm. 57-124 Eng. IV
  "Polygon rendering, Stream Architectures, and the Stream Programming model"
  The same topic was covered in Lecture 8's class presentation by Heemin and Arun: "Memory management in Media Processing," (PDF file)

Lecture 15

• DSP Processors for Wireless Communications: the Viterbi algorithm Class presentation by Kazuo Sakiyama and Hui Li (PDF file)
  A nice introduction to Viterbi is given in the following TI application note: (PDF file) SPRA071 document, available from www.ti.com

Lecture 16

• DSP Processors for Wireless Communications: the Viterbi acceleration hardware (PDF file)
  Reading: I. Verbauwhede, C. Nicol, "Low Power DSP's for Wireless communications," Proc. of the 2000 ISLPED, pg. 303-310, July 2000, (PDF file)
• Class presentation by Vijay Ragunathan and Ram Kumar on "Cyclic Redundancy Check Computation Using TI - DSP" (PDF file)

Lecture 17

• Midterm: pick up Tuesday 5/28 between 4 and 4.45 pm from Letty's desk
  return Wednesday 5/29 latest at 4.45pm on Letty's desk

Lecture 18

• Two class presentations:
  by Y.C. Kuan and Eric Chim on the OMAP platform
  Gee Hang Lui and Henry Lau on the VelociTI.2 processor

Lecture 19

• VLIW processors
  Class presentation by Tom Hsiec, Eric Yee on BlackFin & TigerSharc

Lecture 20

• Project presentations: JPEG on TIC54x, BlackFin, AR|T designer and DK1