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Ingrid M. R. Verbauwhede (June 2003)

 

 

2003

2002

2001

2000

Pre-UCLA

                                                                                                                       

 


2003

                   “Teaching Trade-Offs in System-level Design Methodologies”

                        K. Sakiyama, P. Schaumont, D. Hwang, I. Verbauwhede

                        IEEE 2003 International Conference on Microelectronic Systems Education

                        June 2003

                        Copy of file: pdf Paper [Not Yet Available]

 

         “Design Flow for HW/SW Acceleration Transparency in the ThumbPod Secure Embedded System”

                        D. Hwang, P. Schaumont, Y. Fan, A. Hodjat, B.-C. Lai, K. Sakiyama, S. Yang, I. Verbauwhede

                        Accepted ACM/IEEE Design Automation Conference

    Student design contest winner of DAC-ISSCC Student Design Contest

                        June 2003

                        Copy of file: pdf Paper [Not Yet Available]                        

 

                        “Domain Specific Co-design for Embedded Security”       

                P. Schaumont, I. Verbauwhede

IEEE Computer Magazine: special Issue on “Hardware/Software Co-Design: Tech­niques, Tools and Architectures”

                April 2003, pp. 68-74 

                Copy of file: pdf Paper

 

                        “Design and Performance Testing of a 2.29 Gb/s Rijndael processor” 

                        I. Verbauwhede, P. Schaumont, H. Kuo 

                        IEEE Journal of Solid-State Circuits

                        March 2003, pp. 569-572

                        Copy of file: pdf Paper

 

                        “Finding the best System Design Flow for a high-speed JPEG encoder”

                        K. Sakiyama, P. Schaumont, I. Verbauwhede

                        Proceedings ASPDAC

                        Jan. 2003, pp. 577-578

                        Copy of file: pdf Paper

 

2002

                        “Scalable Session Key Construction Protocol for Wire­less Sensor Networks”

                        Bo-Cheng Lai, S. Kim, I. Verbauwhede

                        IEEE Workshop on Large Scale Real-Time and Embedded Systems

                        LARTES, Dec. 2002

                        Copy of file: pdf Paper

 

                        “Gigabit simulta­neous Bi-directional signaling using DS-CDMA”

                        V. Srinivas, K.J. Bois, D. Knee, D. Quint, M.F. Change, I. Verbauwhede

                        Proceedings IEEE Electrical Performance of Electronic Packaging

                        EPEP 2002, October 2002, pp. 15 -18

                        Copy of file: pdf Paper

 

                        “A dynamic and differential CMOS logic with signal inde­pendent power consumption to withstand differential power analysis on smart cards”

                        K. Tiri, M. Akmal, I. Verbauwhede

                        Proc. 28th IEEE European Solid-State Circuits Conference

                        ESSCIRC Sept. 2002, pp. 403-406

                        Copy of file: pdf Paper

 

                        “The Energy Cost of Secrets in Ad-hoc Networks”

                        A. Hodjat, I. Verbauwhede

                        IEEE Circuits and Systems workshop on wireless communications and networking, Pasadena

                        Sep. 2002

                        Copy of file: pdf Paper

 

                        “Domain Specific Tools and Methods for Application in Secu­rity processor design”

                        P. Schaumont, I. Verbauwhede

                        Kluwer Design Automation for Embedded Systems Journal

                        2002, Volume 7, pp. 365-383

                        Copy of file: pdf Paper

 

                        “A Hardware Implementation in FPGA of the Rijndael Algorithm”

                        C. Chitu, D. Chien, C. Chien, I. Verbauwhede, F. Chang

                        The 45th Midwest Symposium on Circuits and Systems, MWSCAS-2002

                        Aug. 2002, 507-510

                        Copy of file: pdf Paper

 

                        “Unlocking the Design Secrets of a 2.29Gb/s Rijndael processor”

                        P. Schaumont, I. Verbauwhede, H. Kuo

                        Proc. 39th Design Automation Conference

                        Student design contest winner: 1st place in the operational category.

                        DAC 2002, June 2002, pp. 634-639

                        Copy of file: pdf Paper

 

                        “Clock Tree Optimization in Synchronous CMOS Digital Circuits for Substrate Noise Reduction using Folding of Supply Current Transients”

                        M. Badaroglu, K. Tiri, S. Donnay, P. Wambacq, I. Verbauwhede, G. Gielen, H. De Man

                        Proc. 39th Design Automation Conference

                        DAC 2002, June 2002, pp. 399-404

                        Copy of file: pdf Paper

 

                    “A 2.29 Gbits/s, 56 mW Non-Pipelined Rijndael AES Encryption IC in a 1.8V, 0.18

                    mm CMOS technology”

                        H.Kuo, I. Verbauwhede, P. Schaumont

                        2002 IEEE Custom Integrated Circuits Conference

                        CICC 2002, May 2002, pp. 147-150

                        Copy of file: pdf Paper

 

                        “Reconfigurable Interconnect for next generation systems”

                        I. Verbauwhede, M.-C. F. Chang

                        Proceedings ACM/Sigda 2002 International workshop on System Level Interconnect Predic­tion

                        SLIP 2002, Del Mar CA, April 2002, pp. 71-74 (Invited paper)

                        Copy of file: pdf Paper

 

                        “Fast IP Address Lookup Engine for SoC Integration”

                        T. Henriksson, I. Verbauwhede

                        IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop

                        DDECS 2002, April 2002

                        Copy of file: pdf Paper

 

2001

                        “What makes a DSP processor special?”

                        I. Verbauwhede

                        Chapter 42.7 in Computer Engineer­ing Handbook

                        V. Oklobdzija (Ed.)

                        CRC Press

                        December 2001, pp. 42-66 to 42-77

                        Copy of file: pdf Chapter {Not Available}

 

                        “A reconfiguration hierarchy for Elliptic Curve Cryptogra­phy”

                        P. Schaumont, I. Verbauwhede

                        Proc. 35th Asilomar conference on Signals, Systems and Computers, Asilomar, CA

                        Volume: 1, Nov. 2001, pp. 449 –453

                        Copy of file: pdf Paper

 

                        “Hardware/Software Co-design of an Elliptic Curve Public-key Cryptosystem”        

    S. Janssen, J. Thomas, W. Borremans, P. Gijsels, I. Verbauwhede, F. Vercauteren, B. Preneel, J. Vandewalle

    Proceedings IEEE Workshop on Signal Processing Systems, SiPS-2001, Antwerp, Belgium

    September 2001, pp. 209-216

    Copy of file: pdf Paper

 

                        “Benchmarking DSP Architectures for Low Power Applications”

                        D. Hwang, C. Mittelsteadt, I. Verbauwhede

                        Chapter 15 in The Application of Programmable DSPs in Mobile Com­munications

                        A. Gatherer, E. Auslander (Eds.)

                        John Wiley & Sons, Ltd.

                        Fall 2001, pp. 287-298

                        Copy of File: pdf Chapter

 

                        “Programmable Gigabit Ethernet Packet Processor Design Meth­odology”

                        M. Attia, I. Verbauwhede

                        Proceedings European Conference on Circuit Theory and Design, ECCTD, Helsinki, Finland

                        August 2001, pp. III-177-180

                        Copy of file: pdf Paper

 

                        “A Quick Safari through the Reconfiguration Jungle”

                        P. Schaumont, I. Verbauwhede, K. Keutzer, M. Sarrafzadeh

                        Proceedings Design Automation Conference                 

                        DAC-2001, Las Vegas, June 2001, pp. 172-177

                        Copy of File: PDF Paper

 

                    “Architectural Optimizations for a 1.8 Gbits/sec VLSI Implementa­tion of the AES Rijndael Algorithm”

                        H. Kuo, I. Verbauwhede

                        Proceedings Cryptographic Hardware and Embedded Systems

                        Published in Lecture Notes in Computer Science, LNCS 2162

                        C. Koc, D. Naccache, C. Paar (Eds.)

                        Paris, May 2001, pp. 51-64

                        Copy of File: PDF Paper

 

                        “Low Power Showdown: Comparison of Five DSP Platforms implementing an LPC

                        Speech Coder”

                        D. Hwang, C. Mittelsteadt, I. Verbauwhede

                        Proceedings ICASSP2001, Salt-Lake City

                        May 2001, pp. 1125-1128

                        Copy of file: pdf Paper

 

2000

                        “Turbo Codes on the Fixed Point DSP TMS320C55x”

                        T. Ngo, I. Verbauwhede

                        2000 IEEE Workshop on Signal Processing Systems (SiPS), New Orleans

                        Oct. 2000, pp. 255-264

                        Copy of file: pdf Paper

 

Before UCLA

                        “Low Power DSP’s for Wireless Communications”

                        I.Verbauwhede, C. Nicol

                        International Symposium on Low-Power Electronics and Design, ISLPED-00

                        July 2000, pp. 303-310

                        Copy of file: pdf Paper

 

                        “Wireless digital signal processors”

                        I. Verbauwhede, M. Touriguian

                        Chapter 11 in Digital Sig­nal Processing for Multimedia Systems

                        Edited by K.K Parhi, T. Nishitani

                        Marcel Dekker, New York

                        1999 pp. 273-298

                        Copy of file: pdf Chapter

 

                        “A Low Power DSP Engine for Wireless Communications”

                        I. Verbauwhede, M. Touriguian

                        Journal of VLSI Signal Processing Systems

                        Vol. 18, 1998, pp. 177-186

                        Copy of File: pdf Paper

 

                        “Analysis of Multi-dimensional DSP Specifications”

                        I. Verbauwhede, C. Scheers, J. Rabaey

                        IEEE Transactions on Signal Processing

                        Vol. 44, No. 12, December 1996, pp. 3169-3174

                        Copy of file: pdf Paper

 

                        “A Low Power DSP Engine for Wireless Computations”

                        I. Verbauwhede, M. Touriguian, K. Gupta, J. Muwafi, K. Yick, G. Fettweis

                        VLSI Signal Processing IX

                        W. Burleson, K. Kon­stantinides, T. Meng, (eds.)

                        IEEE Press, N.Y.

                        1996, pp. 471-480

                        Copy of file: pdf Paper

 

                        “Synthesis of Real-Time Systems: Solutions and challenges”

                        I. Verbauwhede, J. M. Rabaey

                        Journal of VLSI Signal Processing

                        Vol. 9, No. 1/2, Jan. 1995, pp. 67-88

                        Copy of file: pdf Paper

 

                        “Memory estimation for high level synthesis”

                        I. Verbauwhede, C. Scheers, J. Rabaey

                        Pro­ceedings Design Automation Conference, DAC-94,

                        June 1994, pp. 143-148

                        Copy of file: pdf Paper

 

                        “Specification and support of Multi-dimensional DSP in the SILAGE language”

                        I. Verbauwhede, C. Scheers, J. Rabaey

                        ICASSP-94, International conference on Acoustics, Speech and Signal Processing

                        April 1994

                        Copy of file: pdf Paper

 

                        “ASIC Cryptographic Processor based on DES”

                        I. Verbauwhede, F. Hoornaert, J. Vandewalle, H. De Man

                        Proceedings of the EURO ASIC-91 Conference, Paris, France

                        May 1991, pp. 292-295

                        Copy of file: pdf Paper

 

    “In-place memory management of Algebraic Algorithms on Application Specific Processors”

                        I. Verbauwhede, F. Catthoor, J. Vandewalle, H. De Man

                        Journal of VLSI Signal Processing

                        No.3, 1991, pp. 193-200                             

                        Copy of file: pdf Paper

 

    “In-place memory management of Algebraic Algorithms on Application Specific Processors”

                        I. Verbauwhede, F. Catthoor, J. Vandewalle, H. De Man

                        International Workshop on Algo­rithms and Parallel VLSI Architectures, Pont-a-Mousson, France

                        “Algorithms and Parallel VLSI Architectures”

                        A. van der Veen, E.F. Deprettere (Eds.)

                        Elsevier Science Publ.

                        Vol. B, June 1990, pp. 353-362                             

                        Copy of file: pdf Paper

 

            “Micro-coded ASIC Architecture for Real-Time Extraction of a Fetal Electro Cardiogram using the SVD Algorithm”

                        I. Verbauwhede, M. Vertongen, J. Weijers, F. Catthoor, J. Vandewalle, H. De Man

                        VLSI Signal Processing-IV, H.S. Moscovitz, K. Yao, R. Jain (eds.)

                        IEEE Press, NY

                        1990, pp. 371-380

                        Copy of file: pdf Paper

 

    “Background Memory Synthesis for Algebraic Algorithms on Multi-Processor DSP Chips”

                        I. Verbauwhede, F. Catthoor, J. Vandewalle, H. De Man

                        Proc. IFIP International Conference on VLSI, VLSI-89, Munich, W.-Germany

                        August 1989, pp. 209-218

                        Copy of file: pdf Paper

 

                        “Security and Performance Optimi­zation of a new DES Data Encryption Chip”

                        I. Verbauwhede, F. Hoornaert, J. Vandewalle, H. De Man

                        IEEE Journal of Solid-State Circuits

                        Vol. SC-23, no.3, pp. 647-656, June 1988

                        Copy of file: pdf file

 

                        “Security and Performance Optimi­zation of a new DES Data Encryption Chip”

                        I. Verbauwhede, F. Hoornaert, J. Vandewalle, H. De Man

    Digest of Technical Papers of the European Solid-State Circuits Conference, ESSCIRC-87, Bad Soden, Federal Republic of Germany

                        Sep­tember 1987

                        Copy of file: pdf Paper

 

                        “Security considerations in the Design and Implementation of a new DES chip”

                        I. Verbauwhede, F. Hoornaert, J. Vandewalle, H. De Man

                        Advances in Cryptology, Proceedings EUROCRYPT-87, Springer Verlag, LNCS, No. 304

                        D. Chaum, W. Price (Eds.)

                        1987, pp. 287-300

                        Copy of file: pdf Paper

 

         “Micro power High-Performance Switch Capacitor Building Block for Integrated Low-

         Level Signal Processing”

                        P. Van Peteghem, I. Verbauwhede, W. Sansen

                        IEEE Journal of Solid-State Circuits

                        Vol. SC-20, no.4, August 1985, pp. 837-844

                        Copy of file: pdf file

 

                        “A Micro Power CMOS-Instrumentation Ampli­fier”

                        M. Degrauwe, E. Vittoz, I. Verbauwhede

                        IEEE Journal of Solid-State Circuits

                        Vol. SC-20, no.3, June 1985, pp. 805-807

                   

                                    Reprinted in P. Gray, B. Wooley, R. Brodersen

                                    “Analog MOS Integrated Circuits, II”

                                    IEEE Press

                                    1989, pp 96-98

 

                        Copy of file: pdf Paper

 

                        “A micro power CMOS-Instrumentation Ampli­fier”

                        M. Degrauwe, E. Vittoz, I. Verbauwhede

    Digest of Technical Papers of the European Solid-State Circuits Conference, ESSCIRC-84, Edinburgh, Scotland, September 1984, pp. 31-34

                        Copy of file: pdf Paper

 

 

Theses

 

    “VLSI Design Methodologies for the ASIC realization of cryptographic and algebraic systems”

                        I. Verbauwhede

                        Ph.D. Dissertation

                        Department of Electrical Engineering, K.U.Leuven, Leuven, Belgium

                        July 1991

 

                        “Ontwerp en integratie van een laag vermogen CMOS instrumentatiever­sterker

                        gebaseerd op geschakelde capaciteiten”      

                        I. Verbauwhede

                        Eindwerk, Katholieke Universiteit Leuven, Leuven, Belgium

                        Juli 1984.

        

         (“Design and Integration of a Micro power CMOS-Instrumenta­tion Amplifier,” originally in Dutch,

         Engineering thesis, K.U.Leuven, Leuven, Belgium, July 1984.)

 

 

Magazine Articles

 

                        “Lode DSP Engine, High Performance at Low Power”

                        I. Verbauwhede, M. Touriguian

                        DSP & Multimedia Technology

                        Volume 5, Number 6, November/December 1996, pp. 24-30

 

 

Patents

 

                        U.S. Patent No. 5,710,913, “Method and Apparatus for Executing Nested Loops in a Digital Signal Processor,” Inventors: K. Gupta, M. Touriguian, I. Verbauwhede, H. Neff, Date: Jan. 20, 1998.

 

                        U.S. Patent No. 5,710,914, “Digital Signal Processing Method and System Implementing Pipe­lined Read and Write Operations,” Inventors: I. Verbauwhede, G. Fettweis, Date: Jan. 20, 1998.

 

                        U.S. Patent No. 5,732,255, “Signal Processing System with ROM Storing Instructions Encoded For Reducing Power Consumption During Reads and Method for Encoding Such Instructions,” Inventor: I. Verbauwhede Date: March 24, 1998

 

                        U.S. Patent No. 5,832,257, “Digital Signal Processing Method and System employing separate program and data memories to store data,” Inventors: M. Touriguian, G. Fettweis, I. Verbau­whede, Date: Nov. 3, 1998.

   

                        U.S. Patent No. 6,029,187, “Fast Regular Multiplier Architecture,” Inventor: Ingrid Verbau­whede, Date: Feb. 22, 2000.