Puneet Gupta's home page

*Puneet Gupta*
*Assistant Professor*	*Electrical Engineering*

Email:
Phone:	+1-310-825-1376
Address:	6730C, Boelter Hall, Box 951594, UCLA, Los Angeles CA 90095-1594

Brief Bio

B. Tech, Electrical Engineering.	Indian Institute of Technology, New Delhi	2000. B. Tech Project Title: ``Task Partitioning Between a General Purpose Microprocessor and Reconfigurable Hardware''
Ph.D, Electrical Engineering.	University of California, San Diego	2007. Dissertation Title: ``On Compensating Systematic Variations in Physical Design''
Co-Founder and Product Architect.	Blaze DFM Inc, Sunnyvale CA.	2004-2007

Research Interests
Briefly, my research interests lie generally in optimizing across application-architecture-implementation-fabrication interfaces. Though my primary focus has been the design-manufacturing interface, I have worked on a wide variety of topics ranging from scan-based tesing to topography-aware OPC. Example topics of interest are

Variation-tolerant circuits and systems
Cost-effective VLSI manufacturing leveraging design-awareness
Design challenges for next generation manufacturing
Interactions between architecture/application and hardware design

For further details, see NanoCAD Lab.

Professional Service

Technical Program Committee Member, DAC (2010-), ICCAD (2007-), ICCD(2007), ISQED(2006-), SLIP(2007, 2008), DFM&Y(2007-), ASPDAC (2008-), VLSI Design (2008-)
Vice-Chair CADathlon at ICCAD, 2007
Finance Chair, SLIP, 2008
Track Chair, VLSI Design, 2009, 2010
Session Chair, DAC 2007, DAC 2009
Program Chair, DFM\&Y 2009
Editor, IETE Technical Review (2009)

Teaching

EE M116C/CS151B Computer Architecture
EE209AS The VLSI Design Manufacturing Interface
EE110 Circuit Analysis II

Books and Book Chapters

P. Gupta and E. Papadopoulou, ``Yield Analysis and Optimization'', The Handbook of Algorithms for VLSI Physical Design Automation, CRC Press, to be published.

Awards

2009 SRC Inventor Recognition Award
2009 NSF Faculty Early Career Development (CAREER) Award
2007 European Design Automation Association (EDAA) outstanding dissertation award in the topic "New directions in physical design, design for manufacturing and CAD for analog circuits".
IBM Ph.D. Fellowship, 2004.

Research and funding opportunities available for graduate students. Students who like to cross disciplinary boundaries (VLSI fabrication, devices, circuits, systems, algorithms, statistics ) are especially welcome. Only Ph.D. students and M.S. students who pursue a thesis option will be considered.
Few M.S. project topics are also available without funding. Please contact me for details.

M.S./Ph.D. APPLICANTS: READ THIS BEFORE SENDING ME ANY EMAIL.
For M.S., do not send me an email till you have already applied and sent in your materials. I will not begin looking at M.S./Ph.D. applications before December. When you send me an email, include the following: (1) Your resume in PDF format; (2) Copies/latest drafts of your undergraduate/M.S. thesis in PDF; (3) a brief review + suggestions for improvement of one paper of your choice from my webpage. Absolutely dont contact me if you are not serious and enthusiastic about research. I will only fund incoming Ph.D. or M.S/Ph.D. applicants. If you are in the LA area, feel free to schedule an appointment with me.

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