EE201A Spring 2003 Project
VLSI Architectures and Design Methodologies
May 27, 2003
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A reference set of packets to simulate one page retrieval from the web server is
available in refpack.txt. You can use the
'GET' sequence in this file repetitively to simulate multiple page accesses.
May 22, 2003
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The final homework is posted. This is combined report/presentation, due in Finals Week (2 weeks from now).
Any questions can be directed to the Class Bulletin Board, under the topic 'Final Presentation'.
May 14, 2003
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Homework 6 is posted.
Any questions can be directed to the Class Bulletin Board, under the topic 'Homework 6'.
May 6, 2003
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Homework 5 is posted.
Any questions can be directed to the Class Bulletin Board, under the topic 'Homework 5'.
April 29, 2003
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Homework 4 is posted.
Any questions can be directed to the Class Bulletin Board, under the topic 'Homework 4'.
April 21, 2003
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A patch for uip.c of Homework 3 is here.
April 17, 2003
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Homework 3 is posted.
Any questions can be directed to the Class Bulletin Board, under the topic 'Homework 3'.
April 10, 2003
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Homework 2 is posted.
Any questions can be directed to the Class Bulletin Board, under the topic 'Homework 2'.
April 4, 2003
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The list of teams and target platforms is posted.
April 3, 2003
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Homework 1 is posted.
Any questions can be directed to the Class Bulletin Board, under the topic 'Homework 1'.
April 1, 2003
Project
Final Presentation: Mapping and Wrapping Up
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The task description is available as a PDF file. There is no code to start from this time! Rather, you will use a combination of all code you wrote in this
project. You have over two weeks to prepare for the final presentation - but don't wait until the last minute!
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Important dates coming up:
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Monday June 11: Final report due.
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Wednesday June 13: Final presentation.
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If your target platform is Blackfin, you can come to Lab 53-109 in Engineering IV to pick up an evaluation kit. As with the TI evaluation kits, you will need to sign for receiving this kit
and return it at the final presentation, before the quarter ends.
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If your target platform is Leon, you can log in to the design server to run additional cosimulations up to the Final Presentations Day (Wednesday June 13).
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This homework can be solved in teams. Divide and Conquer.
Homework 6: Design of accelerator handshake protocol (HW/SW cosimulation)
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The homework assignment is available as a PDF file. The GEZEL and SpecC code from which to start is available as a ZIP file.
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If your target platform is TI or BlackFin, you will use SpecC on SEASnet. If your target platform is StrongARM, you will use Linux. If your target platform is LEON, you will use an IVgroup
design server (we will provide you the name by email).
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This homework can be solved in teams.
Homework 5: Design of an accelerator for IP checksum insertion
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The homework assignment is available as a PDF file. The GEZEL and SpecC code from which to start is available as a ZIP file.
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The SpecC homepage contains a wealth of information on SpecC modeling, including examples. The kind of modeling we are doing now best fits in the
category 'implementation model'. The higher levels of modeling will follow later (because of the bottom-up path that we are taking in our design flow).
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The GEZEL Homepage gives an example of an FSMD model of a greatest-common-divisor (GCD) block.
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If you need a refresher on FSMD modeling, take a look at chapter 2 of Embedded System Design: A Unified Hardware/Software Introduction by
Vahid and Givargis.
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This homework can be solved in teams.
Homework 4: System-Level Optimization of the Embedded Webserver
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The homework assignment is available as a PDF file. The C code from which to start is available as a ZIP file.
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Again this is a team-based homework. We will also use the ATOMIUM tools once more, which are installed SEASnet.
Homework 3: Memory Analysis of the Embedded Webserver
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The file uip.c of the ZIP file must be replaced with this uip.c.
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The homework assignment is available as a PDF file. The C code from which to start is available as a ZIP file.
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As always, you can work in team. We will be using the ATOMIUM tools, which are installed on SEASnet. If you have no SEAS account, make sure you request one.
Homework 2: Design of a Test Sequence for the Embedded Webserver
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The homework assignment is available as a PDF file. The C code from which to start is available as a ZIP file.
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In addition to the paper homework, you will need to provide a text file, packets.txt, as the solution. This text file needs to be posted on a EE201A Project Homepage that you will create
for your team. You will need to provide a URL link to this homepage in the paper homework that you turn in.
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To solve the homework, it is very useful to install and use the Ethereal packet sniffer. Ethereal allows you to look at actual network traffic,
and thus provides you with examples of how internet connections are set up. One particularly useful example is to set the sniffer to extract only packets to your computer (use a 'host'
filter), and then open up a webpage to Google on your computer. You will then capture a full sequence of packets that have the same purpose as the ones you need to complete the homework !
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Teams with access to Linux that are not faint-of-heart can also try to use a tunneling driver. This allows you to setup a virtual network on
your computer, and connect the embedded webserver directly to a webbrowser running on your machine. The use of this method is not required to find a solution to the homework. But in some
ways it can be more fun. Use the macro LIVE_COSIMULATION to use this method. Important remark: Do not forget to redefine the IP addresses to 'local ones' like 192.168.x.x before you
turn on tunneling !
Homework 1: Introduction to the Reference Code for the TCP/IP Protocol Stack
Resources
Compiling C on a Workstation ?
In the project we will use advanced design tools like instruction-set simulators and memory-profiling tools. Some of our developments will also require C programming and/or compilation. We will
rely on UNIX and variants.
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If you have a laptop or PC that already runs Windows, consider installing Cygwin. This environment is a port of the UNIX API to Windows, and includes a C
compiler.
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Linux is a good start as well.
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Make sure you have access to a SEASnet account (Solaris). Request it if needed.
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The HP-Lab of the Electrical Engineering department (Eng IV - xxxx) provides access to HPUX.
Reference Protocol Stack
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The starting point of our implementation is the uIP protocol stack by Adam Dunkels. This package contains a set of well-documented C files
that implement TCP/IP with ARP and SLIP support. There is a webserver application (HTTPD) included as well. This protocol stack was originally written for microcontrollers. By analysis of
this code (using techniques shown in class), we will be able to identify and remove bottlenecks.
Useful Tools
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A packet sniffer is a tool that directly picks up network packets as they come out of the network card of the computer you are working on. A packet sniffer such as Ethereal allows you to sniff those packets and get valuable insight into network protocol operation. Note that you cannot install packet sniffers on
machines where you have insufficient access rights - there is an obvious security issue here. You can install it on a PC running Windows or Linux (assuming you have root access). Follow the
instructions on the Ethereal homepage on how to install the sniffer for either Windows or Linux.
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A TAP/TUN driver allows to create a virtual network connection between an application and a host operating system. This allows to debug a protocol stack as a user application. It also
provides an easy method of creating test patterns for the protocol stack. For example, using such a driver it is possible to test the protocol stack from within a web browser. For Linux,
the universal TAP/TUN interface gives this capability. For Windows, we can use the Windows Packet Capture
Library.
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A source code browser can be useful to study C code that you did not wrote yourself. It works like an intelligent editor, which parses the code and keeps track of which variables and
functions are called/used and at what source code location. Source Navigator is such a source code browser with ports to Windows and Linux.
The Target Platform
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LEON: A Sparc v8-compatible core provided by Gaisler Research. The LECCS cross-compiler as well as the TSIM instruction set simulator can be
downloaded form this site.
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StrongArm: A 32-bit Intel Core for embedded applications. We will use the cross compiler from the LART project as well as the instruction-set simulator from Wei Qin at
Princeton.
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BlackFin: A 16-bit DSP core from Analog Devices. We will use the
Visual DSP++ design environment. You need to request an evaluation version if you want to install this development tool on your PC. In lab 53-109, we have an "EZ-Kit Lite" development
board with this processor.
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TI C54: A 16-bit DSP core from Texas Instruments. Software is developed in Code
Composer You can request an evaluation version if you want to install this development tool on your PC. We have a few development kits available that you can use for the project. This
requires you to have a Windows PC at UCLA. You will also have to sign for reception of such a kit and return it at the end of the course before the finals.
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Microblaze: A 32-bit softcore designed Xilinx. We have a node-locked license for this core. If you need to use this environment, we will provide
you with an account and password.
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FPGA/Virtex: If we do hardware development, we will target the Virtex platform from Xilinx. The synthesis environment (accepting VHDL or Verilog)
is available in WebPack. The simulation environment is Modelsim/XE. You can download and use both
environments for free after registration.