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Scientific Publications
- Patrick Schaumont, and Kris Tiri, "Masking and Dual-Rail Logic don't Add up", accepted at Workshop on Cryptographic Hardware and Embedded Systems (CHES 2007), September 2007.
- Kris Tiri, "Side-Channel Attack Pitfalls", invited at Design Automation Conference (DAC 2007), June 2007.
- Kris Tiri, Onur Aciiçmez, Michael Neve, and Flemming Andersen, "An Analytical Model for Time-Driven Cache Attacks", Fast Software Encryption workshop (FSE 2007), March 2007.
- Kris Tiri, and Patrick Schaumont, "Changing the Odds against Masked Logic", Workshop on Selected Areas in Cryptography (SAC 2006), September 2006.
- Mustafa Badaroglu, Kris Tiri, Geert Van der Plas, Piet Wambacq, Ingrid Verbauwhede, Stéphane Donnay, Georges Gielen, and Hugo De Man "Clock Skew Optimization Methodology for Substrate Noise Reduction with Supply Current Folding", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 25, no. 6, pp. 1146-1154, June 2006.
- Ingrid Verbauwhede, Kris Tiri, David Hwang, Ali Hodjat, and Patrick Schaumont, "Circuits and Design Techniques for Secure ICs Resistant to Side-Channel Attacks", International Conference on IC Design & Technology (ICICDT 2006), pp. 1-4, May 2006.
- Kris Tiri, Patrick Schaumont, and Ingrid Verbauwhede, "Side-Channel Leakage Tolerant Architectures", International Conference on Information Technology: New Generation (ITNG) Track on Embedded Cryptographic Systems, pp. 205-209, April 2006.
- David Hwang, Kris Tiri, Alireza Hodjat, Bo-Cheng Lai, Shenglin Yang,
Patrick Schaumont, and Ingrid Verbauwhede, "AES-Based Security Coprocessor IC in 0.18-um CMOS with Resistance to Differential Power Analysis Side-Channel Attacks", IEEE Journal of Solid-State Circuits (JSSC), vol. 41, no. 4, pp. 781-792, April 2006.
- David Hwang, Patrick Schaumont, Kris Tiri, and Ingrid Verbauwhede, "Making Embedded Systems Secure", IEEE Security & Privacy Magazine, vol.4, no. 2, pp. 40-49, April 2006.
- Kris Tiri, David Hwang, Alireza Hodjat, Bo-Cheng Lai, Shenglin Yang, Patrick Schaumont, and Ingrid Verbauwhede, "Prototype IC with WDDL and Differential Routing - DPA Resistance Assessment", Workshop on Cryptographic Hardware and Embedded Systems (CHES 2005), Lecture Notes in Computer Science, vol. 3659, pp. 354-365, August 2005.
- Kris Tiri, David Hwang, Alireza Hodjat, Bo-Cheng Lai, Shenglin Yang, Patrick Schaumont, and Ingrid Verbauwhede, "AES-Based Cryptographic and Biometric Security Coprocessor IC in 0.18-µm CMOS Resistant to Side-Channel Power Analysis Attacks", Symposia on VLSI Technology and Circuits (VLSI SYMPOSIUM 2005), pp. 216-219, June 2005.
- Kris Tiri, David Hwang, Alireza Hodjat, Bo-Cheng Lai, Shenglin Yang, Patrick Schaumont, and Ingrid Verbauwhede, "A Side-Channel Leakage Free Coprocessor IC in 0.18µm CMOS for Embedded AES-based Cryptographic and Biometric Processing", Design Automation Conference (DAC 2005), pp. 222-227, June 2005. Winner DAC/ISSCC 2005 Student Design Contest 3rd place operational category
- Alireza Hodjat, David Hwang, Bo-Cheng Lai, Kris Tiri, and Ingrid Verbauwhede "A 3.84 Gbits/s AES Crypto Coprocessor with Modes of Operation in a 0.18-µm CMOS Technology", Great Lakes Symposium on VLSI (GLSVLSI 2005), pp. 60-63, April 2005.
- Yusuke Matsuoka, Patrick Schaumont, Kris Tiri, and Ingrid Verbauwhede, "Java Cryptography on KVM and its Performance and Security Optimization using HW/SW Co-design Techniques", International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES 2004), pp. 303-311, September 2004.
- Kris Tiri, and Ingrid Verbauwhede, "Secure Logic Synthesis", International Conference on Field Programmable Logic and Applications (FPL 2004), Lecture Notes in Computer Science, vol. 3203, pp. 1052-1056, August 2004.
- Mustafa Badaroglu, Geert Van der Plas, Piet Wambacq, Lakshmanan Balasubramanian, Kris Tiri, Ingrid Verbauwhede, Stephane Donnay, Georges Gielen, and Hugo De Man, "Digital Circuit Capacitance and Switching Analysis for Ground Bounce in ICs with a High-Ohmic Substrate", IEEE Journal of Solid-State Circuits (JSSC), vol. 39, no. 7, pp. 1119-1130, July 2004.
- Mustafa Badaroglu, Lakshmanan Balasubramanian, Kris Tiri, Vincent Gravot, Piet Wambacq, Geert Van der Plas, Stephane Donnay, Georges Gielen, and Hugo De Man, "Digital Circuit Capacitance and Switching Analysis for Ground Bounce in ICs with a High-Ohmic Substrate", European Solid-State Circuits Conference (ESSCIRC 2003), pp. 257-260, September 2003.
- Mustafa Badaroglu, Kris Tiri, Stephane Donnay, Piet Wambacq, Ingrid Verbauwhede, Georges Gielen, and Hugo De Man, "Clock Tree Optimization in Synchronous CMOS Digital Circuits for Substrate Noise Reduction Using Folding of Supply Current Transients", Design Automation Conference (DAC 2002), pp. 399-404, June 2002.
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