ECE Newsletter – October 7, 2024

News  |  October 7, 2024

Ozcan Lab published a new article in Nature Communications on the imaging and staining of amyloid deposits in label-free tissue using deep learning

Ozcan Lab's article about imaging and staining amyloid deposits

Figure 1 extracted from the article in Nature Communications

Please see the full article and press release.


In collaboration with Liang Gao’s lab at UCLA, Ozcan Lab published a new article in PNAS on a new technique for light-field tomographic fluorescence lifetime imaging

Ozcan Lab's technique for light-field tomographic fluorescence lifetime imaging

Please see the full paper.


Awards


Professor Jason Cong won the 2024 Phil Kaufman Award

Professor Jason Cong won the 2024 Phil Kaufman Award. This award is widely regarded as the Nobel Prize of EDA (electronic design automation), and Professor Cong is the first awardee from UCLA. To quote from  Prof. Cong’s award citation, he has made “sustained, seminal contributions to design automation for FPGA [Field-Programmable Gate Array] designs from chips to systems, across logic, layout, compilation, and applications, over a remarkable 30-plus-year span,” with “widespread industrial impact.” Please see the official award announcement. For the significance of this award and a list of past winners, see the Wikipedia webpage.


Yu-Tao Yang, Student of Professor Iyer, Wins Mahboob Khan Outstanding Liaison Award 2024

An image of Yu-Tao

Yu-Tao, a student of Professor Iyer, has been awarded the prestigious Mahboob Khan Outstanding Liaison Award, recognizing his significant contributions to the SRC Liaison Program. This award, named in memory of Mahboob Khan, honors liaisons who advance technology transfer from university research to the semiconductor industry. With less than 10% of nominees selected, this recognition highlights Yu-Tao’s exceptional dedication to the program. Reflecting on the honor, Yu-Tao said, “I feel incredibly fortunate to have been awarded this.”

The award was presented at the SRC TECHCON event.


Finalist for the 2024 Alton B. Zerby and Carl T Koerner Outstanding Electrical or Computer Engineering Student Award

Congratulations to Eugene Min, who graduated from UCLA in June 2024 with a BS in Electrical Engineering. Eugene’s hard work and dedication have earned him a spot as one of the finalists for the prestigious 2024 Alton B. Zerby and Carl T Koerner Outstanding Electrical or Computer Engineering Student Award.

The finalists will be honored at the Student Leadership Conference from November 15-17, 2024, hosted by the Kappa Phi Chapter at the University of North Carolina, Charlotte. 


Upcoming PhD Oral Defenses


11/13

Ph.D. Student: Jialin Dong

Time: 11am-1pm

Room: Faraday Room

12/2

Ph.D. Student: Elvis Nunez

Time: 4-5pm

Room: Maxwell Room

11/21

Ph.D. Student: Shuo Hwai

Time: 12-2pm

Room: Maxwell Room


Job Opportunities


Design Verification Engineer at Apple

Do you have a passion for invention and self-challenge? This position gives you an opportunity to be a part of one of the most cutting edge and key projects that Apple’s Silicon Engineering Group has embarked upon to-date. As a Design Verification Engineer on their team, you’ll be at the center of the verification effort within our silicon design group responsible for crafting and productizing state-of-the-art Cellular SoCs!

You will have the opportunity to contribute to the verification effort of a set of complex SOCs delivering the Cellular solution. You will integrate multiple sophisticated IP level DV environments, craft highly reusable best-in-class UVM based test bench, implement effective coverage driven and directed test suites, deploy new tools and methodologies to deliver chips that are right-first-time. By collaborating with other product development groups across Apple, you can push the industry boundaries of what cellular systems can do and improve the product experience for our customers across the world!

Through this experience, you will learn all aspects of a large scale SOC design, Complex verification test benches, different types of SOC architectures, multiple high speed protocols, industry-standard low power architecture, best in class DV methodology, verification on accelerated platforms, knowledge on Cellular protocol, FW-HW interactions, complexities of multi-chip SOC debug architecture, etc.

Key Qualifications:

MS in EE or CS. Coursework in Digital Design, Computer Architecture, Object Oriented Programming, Networking Protocol. Programming experience in SystemVerilog or Python or C++ or Java.

Must be graduating by Dec ’24.

Please send your resume to j_lou@apple.com.


Newsletter Submissions

To be included in future newsletters, please send the latest news, awards, publications and any upcoming PhD oral defenses to the Chair’s assistant, Winda Mak, at wmak@seas.ucla.edu. Please include “newsletter submission” in the subject line. The ECE newsletters will be sent bimonthly on the first and third Mondays of the month. Please ensure all submissions are received by the Wednesday before distribution to be included in the newsletter.