Interface Engineering of Voltage-Controlled Embedded Magnetic Random Access Memory

Speaker: Xiang “Shaun” Li
Affiliation: Ph.D. Candidate - UCLA

Abstract: Magnetic memory that utilizes spin to store information has become one of the most promising candidates for next-generation non-volatile memory. Electric-field-assisted writing of magnetic tunnel junctions (MTJs) that exploits the voltage-controlled magnetic anisotropy (VCMA) effect offers great potential for high density and low power memory applications. This emerging Magnetoelectric Random Access Memory (MeRAM) based on the VCMA effect has been investigated due to its lower switching current, compared with traditional current-controlled devices utilizing spin transfer torque (STT) or spin-orbit torque (SOT) for magnetization switching. It is of great promise to integrate MeRAM into the advanced CMOS back-end-of-line (BEOL) processes for on-chip embedded applications, and enable non-volatile electronic systems with low static power dissipation and instant-on operation capability. To achieve the full potential of MeRAM, it is critical to design magnetic materials with high voltage-induced writing efficiency, i.e. VCMA coefficient, to allow for low write energy, low write error rate, and high density MeRAM at advanced nodes.

            In this dissertation, we will discuss three experimental approaches taken to enhance the VCMA coefficient. First, a high dielectric-constant hybrid tunnel barrier is used to increase the VCMA coefficient. Then, by carefully controlling the Mg insertion thickness at the CoFeB/MgO interface, the Fe/O interfacial oxidation condition can be precisely controlled to identify the optimal oxidation condition for large VCMA coefficient. Last, different heavy metal based seed/Mo materials are explored to achieve stable VCMA coefficient, TMR, and perpendicular magnetic anisotropy (PMA) when annealed at temperatures exceeding 400oC, making MeRAM compatible with embedded applications. In addition, we have carefully studied the correlation between element distribution and the magnetic properties of these stacks via high-resolution transmission electron microscopy (TEM). The insight obtained will provide critical guidance to future development of both spin-transfer torque and voltage-controlled magnetic memory.

Biography:  Xiang (Shaun) Li is currently a Ph.D. Candidate in the Department of Electrical and Computer Engineering under the mentorship of Prof. Kang L. Wang. He received his M.S. degree from UCLA Electrical Engineering in 2016 and B.S. in Physics degree from Peking University, China in 2013. His research interests lie in magnetic materials and devices for low-power memory applications. He has done magnetic reader low frequency noise modeling research as a Ph.D. reader test intern at Seagate Technologies in 2015. Apart from research, he is also passionate about technology commercialization. He was a Technology Fellow at UCLA Technology Development Group from 2016 to 2017 responsible for analyzing the technical merit and market potential for various UCLA patents. From 2017 to present, he was also responsible for technical partnership and investor development at Inston, Inc. to commercialize the MeRAM technology.

For more information, contact Prof. Kang Wang ()

Date(s) - Apr 16, 2018
10:00 am - 12:00 pm

E-IV Faraday Room #67-124
420 Westwood Plaza - 6th Flr., Los Angeles CA 90095