News  |  March 17, 2025

Distinguished Professor Asad M Madni Selected for Induction to the Space Technology Hall of Fame and Appointed President of the Asia Pacific Artificial Association

Space Foundation, a nonprofit organization founded in 1983 to advance the global space community, recently announced that two leading-edge technologies developed for space will be inducted into the 2025 Space Technology Hall of Fame® (STHF). The induction ceremony will occur during the annual Space Symposium, to be held April 7–10, 2025, at The Broadmoor in Colorado Springs. 

Distinguished Adjunct Professor Asad M Madni has been selected for induction for the GyroChip® – Quartz Rate Sensor! According to STHF, “this prestigious recognition honors the significant impact your technology has made by bringing space innovations to benefit life on Earth. Your technology stood out among a competitive field of nominees, and we are thrilled to celebrate your achievement”.

The GyroChip®, a groundbreaking quartz rate sensor developed by BEI Technologies, revolutionized navigation, stabilization, and guidance systems across aerospace, defense, and automotive industries. Originally designed to enhance precision guidance for military and space applications, this compact quartz-based gyroscope was commercialized for widespread use, leading to its integration into over 90 aircraft models and 80 passenger vehicle designs. The automotive industry alone has incorporated more than 55 million GyroChips®, enabling advanced stability control systems that enhance vehicle safety.

At the forefront of this innovation was Dr. Asad M. Madni, who led the development and commercialization of the GyroChip®. As President, Chief Operating Officer, and Chief Technology Officer of BEI Technologies from 1992 until its $600 million acquisition by Schneider Electric in 2006, Dr. Madni played a pivotal role in transforming the technology from a high-cost aerospace instrument into an affordable, mass-produced solution. Under his leadership, BEI successfully adapted the GyroChip® for commercial markets by streamlining manufacturing and reducing costs, making it the world’s leading stability control sensor for automobiles.

The GyroChip®’s success reshaped multiple industries by making high-precision navigation and stability control widely available. Its legacy endures through its influence on contemporary inertial sensing technologies, ensuring safer and more efficient transportation and aerospace operations worldwide.

Commenting on the newest inductees, Space Foundation CEO Heather Pringle said, “BEI Technologies and NASA’s Jet Propulsion Laboratory have developed solutions that not only advance space exploration but also enhance safety, efficiency and our quality of life. We are proud to recognize their contributions as part of the 2025 Space Technology Hall of Fame.”

Founded in 1988 in partnership with NASA, the Space Technology Hall of Fame recognizes the life-changing technologies emerging from global space programs; honors the scientists, engineers and innovators responsible; and communicates to the public the importance of these technologies as a return on investment in space exploration.

Professor Madni was also appointed President of the Asia Pacific Artificial Intelligence Association for a two year term commencing January 2025.

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Professor Ozcan Delivers the Keith Terasaki Award Lecture at the Terasaki Innovation Summit

Dr. Ozcan delivered the Keith Terasaki Award Lecture at the Terasaki Innovation Summit on March 7th and received the inaugural Keith Terasaki Mid-Career Innovation Award presented by the Terasaki Institute. This recognition is given in memory of Dr. Keith Terasaki, who had a remarkable legacy of scientific and philanthropic leadership – following the footsteps of his father, Dr. Paul Terasaki.

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Professor Cong’s Paper Inducted Into FPGA and Reconfigurable Computing Hall of Fame

Congratulations to Professor Cong for his paper titled “Optimizing FPGA-based Accelerator Design for Deep Convolutional Neural Networks,” published at the 23rd International Symposium on Field-Programmable Gate Arrays (FPGA’15) and co-authored with Chen Zhang, Peng Li, Guangyu Sun, Yijin Guan, and Bingjun Xiao,  being inducted into the FPGA and Reconfigurable Computing Hall of Fame by the ACM SIGDA Technical Committee on FPGAs and Reconfigurable Computing.  This paper presented the first FPGA acceleration of deep neural networks, and has over 2,500 citations as of the end of 2024. This is the fifth paper co-authored by Professor Cong to be inducted into the FPGA and Reconfigurable Computing Hall of Fame.

Please see the original paper and the endorsement.  

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Professor Carbajo Publishes Article in Issues in Science and Technology

Professor Carbajo recently published an article from the National Academy of Sciences journal Issues in Science and Technology, entitled  “Nurturing Deeper Ways of Knowing in Science.” This thought-provoking piece explores innovative approaches to expanding scientific understanding and fostering deeper connections within the scientific community. Dive into the discussion and discover how we can enrich the ways we perceive and engage with science.

Please see the full article.

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Professor Babakhani’s Group Publishes Paper on Ultra-Low Power 280GHz Radar for Sensing Applications

W. Sun, S. Thomas and A. Babakhani, “A 0.28 THz Super-Harmonic Self-Injection-Locked Radar for Vibration Sensing and Phase Imaging,” in IEEE Microwave and Wireless Technology Letters.

Please see the full paper.

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Awards

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PhD Student Jack Hirschman Receives Outstanding Achievement Award at CoDA 2025

PhD student Jack Hirschman from the Quantum Light-Matter Cooperative under Professor Carbajo’s supervision, received an outstanding achievement award at the Conference on Data Analysis (CoDA 2025) in Santa Fe, New Mexico, hosted by the U.S. Department of Energy (DOE).

Jack’s hard work and innovation were recognized with the Student Poster Award for his research on high-throughput X-ray diagnostics using heterogeneous hybrid neural networks at SLAC National Accelerator Laboratory. This cutting-edge work showcases the incredible potential of advanced data analysis techniques in scientific discovery.

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Events/Seminars

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Upcoming PhD Defenses

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Student Organizations

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LA HACKS 2025 at UCLA April 25-27

Are you ready to turn your ideas into reality? LA Hacks 2025, Southern California’s largest hackathon, is happening from April 25-27, 2025, at UCLA’s iconic Pauley Pavilion. Here’s why you can’t miss it:

 $30,000+ in Prizes: Showcase your skills and walk away with more than just memories, in addition to meals and snacks provided throughout the event.

 Learn & Level Up: Access exclusive workshops, mentorship, and cutting-edge tools from top sponsors like Google, Amazon, and Snapchat.

 Career-Boosting Connections: Network directly with recruiters and hiring managers from leading tech companies.

Whether you’re a first-time hacker looking to learn or an advanced developer aiming to push boundaries, LA Hacks is the place to be. Register at lahacks.com. If you are not ready to apply, feel free to join our mailing list!

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Job Opportunities

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Job Opportunity: Postdoctoral Scholar at UCLA Center for Advanced Surgical and Interventional Technology

Position description:

Are you passionate about advancing the frontier of healthcare technology? Dr. Bijan Najafi’s renowned research team at the University of California, Los Angeles (UCLA) invites applications for a Postdoctoral Researcher position. This role offers the opportunity to contribute to cutting-edge studies in remote patient monitoring, frailty, dementia, and wearable technologies designed to empower older adults to live independently and age in place.

We are seeking a highly motivated individual with a Ph.D. in Biomechanics, Kinesiology, or a related field. The ideal candidate will have expertise or familiarity in:

• Wearable technologies for human motion analysis

• Motion tracking systems

• Gait and balance assessments

• Muscle activity monitoring and motor disability evaluation

Start Date: As soon as possible

Qualifications:

Basic qualifications: PhD

Preferred qualifications: Ph.D. in Biomechanics, Kinesiology, or a related field.

Application Requirements:

Document requirements

• Curriculum Vitae – Your most recently updated C.V.

• Cover Letter – Limited to two pages, summarizing your career goals and prior   research relevant to human movement analysis.

• Statement of Research (Optional)

• Reference check authorization release form – Complete and upload the reference check authorization release form

• Sample Publication – A sample of a relevant prior publication.

Reference requirements

• 3-5 required (contact information only)

Please see the full posting. 

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Internship Opportunity: Design Verification Engineer Intern at Apple

Apple is seeking a Design Verification Engineer intern in their first year of an MS degree and will graduate either in Dec 2025 or May 2026. 

Position description:

Through this experience, you will learn all aspects of a large scale SOC design, complex verification test benches, different types of SOC architectures, multiple high speed protocols, industry-standard low power architecture, best in class DV methodology, verification on accelerated platforms, knowledge on Cellular protocol, FW- HW interactions, complexities of multi-chip SOC debug architecture, etc. 

Please send your resume to j_lou@apple.com if interested.

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Internship Opportunity: Ayar Labs

Ayar Labs is in search of a number of summer interns. The internships span several areas, including circuit design, photonics, computer vision/AI, data science, and hardware engineering. 

For more details and to apply, students can visit: Ayar Labs Internship Opportunities.

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Job Opportunity: Cellular SOC Design Verification Engineer – Entry Level at Apple

Description
Do you have a passion for invention and self-challenge? This position gives you an opportunity to be a part of one of the most cutting-edge and key projects that Apple’s Silicon Engineering Group has embarked upon to-date. As a Design Verification Engineer on our team, you’ll be at the center of the verification effort within our silicon design group, responsible for crafting and productizing state-of-the-art Cellular SoCs!

You will have the opportunity to contribute to the verification effort of a set of complex SOCs delivering the Cellular solution. You will integrate multiple sophisticated IP level DV environments, craft highly reusable best-in-class UVM-based test benches, implement effective coverage-driven and directed test suites, and deploy new tools and methodologies to deliver chips that are right-first-time. By collaborating with other product development groups across Apple, you can push the industry boundaries of what cellular systems can do and improve the product experience for our customers across the world!

Through this experience, you will learn all aspects of large-scale SOC design, complex verification test benches, different types of SOC architectures, multiple high-speed protocols, industry-standard low power architecture, best-in-class DV methodology, verification on accelerated platforms, knowledge of Cellular protocol, FW-HW interactions, and the complexities of multi-chip SOC debug architecture.

Minimum Qualifications

• BS in Electrical Engineering (EE) or Computer Science (CS) is required
• Object-Oriented Programming
• Coursework in Digital Design

Preferred Qualifications

• MS in Electrical Engineering (EE) or Computer Science (CS)
• Must graduate by June 2025
• Coursework in Computer Architecture, Networking Protocol
• Should be a great teammate with excellent communication and problem-solving skills and the desire to seek diverse challenges
• Programming experience in SystemVerilog, Python, and C++

Pay & Benefits
At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $121,900 and $183,600, and your base pay will depend on your skills, qualifications, experience, and location.

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Research Opportunity: Geothermal Technology Development (UCLA)

The research group of Professor Sergio Carbajo at UCLA is seeking a highly motivated

graduate engineering student to contribute to an exciting geothermal technology research project for 1-2 months during Winter Quarter. This is an excellent opportunity to gain hands-on research experience and earn university research credit.

Project Overview:

This project, under the direction of Professor Carbajo, focuses on developing innovative technologies to enhance geothermal energy extraction and super deep drilling. The selected student will play a key role in the design and modeling of novel technology.

Responsibilities:

• Utilize CAD software to design and refine components for direct energy drilling and geothermal rigging systems.
• Contribute to the modeling and analysis of hydrodynamic and electromagnetic phenomena within the system.
• Collaborate with the research team to interpret simulation results and contribute to project discussions.
• Document research findings and contribute to technical reports or presentations.

Qualifications:

• Currently enrolled graduate student in Electrical Engineering (EE) or Mechanical Engineering at UCLA.
• Experience with CAD design software (e.g., SolidWorks, AutoCAD, Fusion 360).
• Interest or experience in hydrodynamics and electromagnetism.

Preferred Qualifications:

• Expertise with Field-Effect Transistors (FETs) or Metal-Oxide Semiconductor Field-Effect Transistors (MOSFETs).

Benefits:

• Earn university research credit.
• Gain valuable research experience in a cutting-edge field.
• Opportunity to contribute to a real-world energy solution for climate change.
• Work alongside experienced researchers and faculty at UCLA, including Professor Sergio Carbajo.

Time Commitment:

1-2 months during Winter Quarter, with flexible scheduling to accommodate academic

commitments.

To Apply:

Interested students should submit their resume/CV and a brief statement of interest (one paragraph) outlining their relevant skills and experience to johnfstrike@gmail.com. Please include “Geothermal Research Application” in the subject line. Review of applications will begin immediately and continue until the position is filled.

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Electronics/PCB Development Undergraduate Internship Opportunity

Employment Period: Year-round

Location: On-campus

Approximate hours per week: 5+ hours

Duration: 6-24 months

Salary / Pay rate / Stipend: $20/hour

Relevant Website: https://www.edroplets.org/

Job description

Digital microfluidics is a technology that enables programmable control over individual droplets using electrical signals on a chip, which has been transforming wet labs towards the era of lab-on-a-chip. You will develop electronic control circuits for operating digital microfluidics chips. This is a highly engineering-oriented project, which requires independent schematic design, PCB layout design, PCB manufacturing, and assembly outsourcing for various circuits and electronic systems. You will also work with the mechanical design and software development team guided by graduate students to create multiple products. These products will be used by numerous digital microfluidics researchers and startups around the world through an open-source platform (edroplets.org).

For domestic students (US Citizen or Permanent Resident), the payment may be a stipend from the National Science Foundation (NSF) Research Experiences for Undergraduates (REU) program. 

For international students, the payment will be through a regular research fund.

For those who prefer research credits over stipends, SRP 99 or MAE 199 is also possible.

What you will get:

(1) You will experience creating a real-world electronic product for a transformative technology, which will be used by lots of real users!

(2) You will get hands-on experience and training in schematic/PCB/electronics design and development

(3) You will learn the basic knowledge and industry status of digital microfluidics, and participate in translating ground-breaking research into real-world products

(4) You may become a co-author of resulting journal and conference publications

Quality & skill desired:

(1) A strong and genuine interest in electronics is essential. If you are a DIYer who loves working with electronics and wants to build something impactful, this is a perfect project for you.

(2) Enjoy working in a team with different expertise is essential. The ability to articulate your work to non-technical team members is essential.

(3) Experience with Altium Designer, KiCAD or other PCB design software is a plus. Experience with LabView is a plus. Experience in making a PCB from design to manufacturing is a huge plus.

(4) No experience or knowledge of digital microfluidics is required

Interested? Please send your resume to Professor CJ Kim (cjkim@ucla.edu) and Leo Wang (wangqining265@gmail.com). If there’s a good match, you will be invited to an interview.

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Newsletter Submissions

To be included in future newsletters, please send the latest news, awards, publications and any upcoming PhD oral defenses to the Chair’s assistant, Winda Mak, at wmak@seas.ucla.edu. Please include “newsletter submission” in the subject line. The ECE newsletters will be sent bimonthly on the first and third Mondays of the month. Please ensure all submissions are received by the Wednesday before distribution to be included in the newsletter.