Speaker: Zhe Wan
Affiliation: Ph.D. Candidate
Abstract: Recent developments in artificial intelligence (AI) are largely supported by the enablement of large-scale neuromorphic computing from the advancement of computing capability of the hardware. However, as digital systems are optimized for fast, accurate, and versatile computing, analog computing systems become attractive for their energy efficiency and throughput in AI applications. In this dissertation, we explore and optimize a conventional CMOS transistor, the charge-trap transistor (CTT), as an analog in-memory computing unit for neural networks. In addition, to adapt to the finite variation of the analog devices and circuits, we develop novel methods to characterize and improve the resiliency of neural networks deployed on analog computing systems. Furthermore, as scaling of the network plays a crucial role in enhancing its capability, this dissertation evaluates advanced system scaling technologies to scale out the analog computing hardware in a scalable non-von Neumann architecture. Finally, our findings are brought together and realized by the hardware demonstration of an analog neuromorphic system – the NeuroCTT chip. We conclude with characterization result of the NeuroCTT chip with several future directions for scalable and analog neuromorphic systems.
Biography: Zhe Wan (M’16) received the B.S. and M.S. degree in Electrical Engineering from University of California, Los Angeles (UCLA), CA in 2013 and 2017, respectively. He is now a graduate student at UCLA with the Center for Heterogeneous Integration and Performance Scaling (CHIPS), working on neuromorphic computing and large-scale system integration. In 2015, he was an intern with the IBM corporation 3Di team at Albany NY, working on three-dimensional wafer-scale integration technologies. He was a recipient of the IBM Ph.D. Fellowship in 2017. His research interests include characterization of analog devices for neuromorphic computing, design of mixed-signal neuromorphic systems and system scaling technologies for ultra-large-scale neuromorphic systems.
For more information, contact Prof. Subramanian S. Iyer ()
Date(s) - Feb 26, 2020
2:00 pm - 4:00 pm
E-IV Maxwell Room #57-124
420 Westwood Plaza - 5th Flr. , Los Angeles CA 90095