Semiconductor Memories – CANCELLED

Speaker: Toshiaki Kirihata
Affiliation: IBM Semiconductor Research and Development Center

Abstract:  Evolutionary improvements in semiconductor technology have been responsible not only for high performance servers, but also for introducing consumers to personal computing and the information era.  Advances in semiconductor memories have been vital to these improvements. Static Random Access Memory (SRAM) has been the key device for high performance cache memory, whereas Dynamic Random Access Memory (DRAM) has been the predominant choice for high density, low cost main memory in computing systems. High performance logic based embedded DRAM technology has provided an optimized embedded system for ASIC and cellular super computing products, and has been a key element for boosting the performance of the multi-core microprocessors requiring high-density CACHE memory. Through-silicon-via (TSV) technology offers the ability to stack memories, enabling density improvements but also the ability to create an integrated system solution by stacking memory and logic. Non-volatile memory (NVM) technologies are commonly used for portable media and solid-state disks. Embedded nonvolatile solution using emerging memories are gaining significant prominence, especially in firmware, programmable logic, and machine learning applications.

In this talk, we discuss research and development for semiconductor memories. The discussion starts with a memory tutorial, then focuses on embedded DRAM and followed by a look at embedded charge trap transistor memory.  We will then explore the use of memory fingerprints in hardware security engines. To conclude this talk, future work in semiconductor memories will be discussed.

Biography:  Toshiaki Kirihata, senior member of the IEEE, received his B.S. and M.S. degrees in Precision Engineering from Shinshu University, Nagano, Japan, in 1984 and 1986, respectively. In 1986, he joined IBM Research, Tokyo Research Laboratory, and worked on high-speed DRAM design development. In 1996, he transferred to IBM Research, T. J. Watson Research Center, where he worked on research and development for high-density DRAMs. In 2000, he joined the IBM Semiconductor Research and Development Center, East Fishkill, where he has been working on the development of high performance embedded DRAMs and embedded 3D memories as a design manager. Mr. Kirihata presented papers at the ISSCC 1998, 1999, 2001, and 2004 conferences. He received the Lewis Winner outstanding paper award on the ISSCC paper entitled “A 500MHz Random Cycle, 1.5ns Latency, SOI Embedded DRAM macro Featuring a Three Transistor Micro Sense Amplifier.” He is currently a design manager for GLOBALFOUNDRIES responsible for advanced silicon and packaging technology development.  Mr. Kirihata is an IEEE CICC committee member on memory, and served as a Memory session chair in the year 2014. His research interests include high performance embedded DRAM, embedded non-volatile memory, 3D memory, and hardware security. He is one of the authors of “CMOS Processors and Memories” (Springer, 2010) and “Circuit for Emerging Applications” (CRC Press, 2014), contributing to the chapters on eDRAM and intrinsic chip ID using eDRAM, respectively.

For more information, contact Prof. Subramanian Iyer ()

Date/Time:
Date(s) - Feb 20, 2018
3:00 pm - 4:00 pm

Location:
E-IV Maxwell Room #57-124
420 Westwood Plaza - 5th Flr. , Los Angeles CA 90095