Speaker: Yue Zhang
Affiliation: Assoc. Professor, Beihang University
Abstract: The shrinking of complementary metal oxide semiconductor (CMOS) fabrication node below 90 nm leads to high static power in memories and logic circuits due to the increasing leakage currents. Emerging spintronic technology is of great interest to overcome this issue thanks to its non-volatility, high access speed and easy integration with CMOS process. Spin based memory applications, such as STT-MRAM, have been extensively investigated in the past decade, and are approaching wide commercialization. Beyond memory, spin based logic becomes a new “fort” that the researchers want to capture. This talk is dedicated to the ultra-low power computing realized by spintronics from different perspectives, i.e. devices, circuits and systems. Particularly, high-speed spin orbit torque magnetic tunnel junction (SOT-MTJ) and all spin logic device (ASLD) are respectively introduced. Hybrid spin/CMOS logic circuits based on logic-in-memory structure, such as magnetic flip-flop and full adder, are proposed and analyzed. Finally, system-level evaluations are also carried out to demonstrate the prospect of spintronics based computing.
Biography: Yue ZHANG received the B.S. degree in optoelectronics from Huazhong University of Science and Technology, China, in 2009 and the M.S. degree and Ph.D. degree in microelectronics from University of Paris-Sud, France, in 2011 and 2014, respectively. He is currently an associate professor at Beihang University, China. His research interests include emerging non-volatile memory technologies and hybrid circuit designs with a focus on spintronic devices and low-power computing. He has authored more than 60 scientific papers in referred journals and conferences and received three best paper awards from the international conferences, such as NANOARCH, NEWCAS and ESREF. He has served as TPC chair or member for several international conferences, and he is serving as reviewer for numerous flagship journals, such as Nature Comm., Sci. Rep., IEEE trans. Elec. Dev., IEEE trans. Circ. Syst. I, etc.
Date(s) - Oct 28, 2016
11:00 am - 12:00 pm
E-IV Tesla Room #53-125
420 Westwood Plaza - 5th Flr., Los Angeles CA 90095