Speaker: Qaiser Nehal
Affiliation: Ph.D. Candidate - UCLA
Cognitive radios (CR) use “white spaces” in the spectrum for communication purposes to alleviate spectral scarcity issue. Therefore, CR front-end circuits need to be wideband, reconfigurable, and highly linear so that they can operate in a dynamic fashion. In this work, we analyze the linearity of widely used receiver building blocks such as transconductors (Gm), passive mixers and baseband transimpedance amplifiers (TIA) and propose methods to improve their large-signal handling capability.
High-linearity receivers also need low phase-noise local oscillator (LO) to prevent corruption of the wanted signal through reciprocal mixing. Therefore, a low phase-noise divide-by-4 circuit (-175 dBc/Hz at 80 MHz offset) was developed to be used in the prototype high-linearity receiver. The prototype receiver was fabricated in 16nm FinFET CMOS process and works from 100 MHz to 6GHz. Measured results show that it can withstand +12 dBm CW blockers (at 8x Baseband Bandwidth) and has blocker noise figure of 8.9 dB for a CW +10 dBm blocker (80MHz offset from LO). Measured IIP2 of the receiver was +74 dBm, and IIP3 was +27 dBm (in mixer-1st mode, and >4x Baseband Bandwidth offset from LO).
Qaiser Nehal received his B.S. degree from UET Lahore Pakistan, and his M.S. degree from Aalto University Finland. He is currently a Ph.D. candidate in the Electrical and Computer Engineering department under the supervision of Prof. Asad A. Abidi. He was an intern at Broadcom, Irvine, and was a recipient of the Broadcom UCLA Fellowship during the 2014-15 academic year. His research interests are in developing high-linearity front-ends for radio receivers.
Date(s) - Sep 11, 2018
2:30 pm - 4:00 pm
E-IV Faraday Room #67-124
420 Westwood Plaza - 6th Flr., Los Angeles CA 90095