Baseband and LO Techniques based on CMOS Integration for Wideband Millimeter-Wave Sensing

Speaker: Yan Zhang
Affiliation: Ph.D. Candidate - UCLA

Via Zoom Only:  https://ucla.zoom.us/j/524432108 

Abstract: Millimeter-wave circuits and systems have always been an important instrument for scientific research and discovery. Multi-sensor and multi-pixel integration demand cheaper, smaller, and more efficient components. Modern integrated CMOS technology, despite its speed and noise limitations, is a natural candidate.

With CMOS in its more traditional role, the first part of this talk presents three generations of RF spectrometer SoCs with emphasis on the design and optimization of 2k/8k/16k FFT processors. The use of extended Radix-2^K (K = 2, 3, 4, 5) algorithm, maximized constant-multipliers, and optimal parallel-pipeline partition allow the designs to fit in a compact floorplan with limited routing resources at 3/6/12-GHz equivalent speed. They represent the largest and the most efficient designs even without considering additional features such as sampling front-end or built-in windowing.

The second part, breaking from convention, explores the use of CMOS digital inverter rings for ultra-wide-range millimeter-wave LO generation as a compact and scalable alternative to high-order LC networks. Based on ring oscillator scaling properties and the optimal conditions for sub-harmonic injection locking, a new methodology is proposed to co-design robust multi-ratio VCO-ILFD pairs. Put in a cascaded PLL, the fabricated prototype covers 23-39GHz with phase noises below -96dBc/Hz at 1MHz offset across the entire range. Further improvement can be easily achieved with better device and passive modeling. Additional frequency multipliers are also proposed to take advantage of the quadrature output for triband band (28/39/60-GHz) and full W-band (75-110GHz) support.

Biography: Yan Zhang received his B.S.E. degree in electrical engineering from Arizona State University in 2012. After completing his M.S. program in electrical engineering at UCLA, he joined Teradyne’s enabling technology group as a mixed-signal ASIC designer from 2014 to 2016. He is currently pursuing his Ph.D. degree with the high-speed electronics laboratory at UCLA. His research interests focus on mixed-signal circuits and systems for sensing and communication.

For more information, contact Prof. Frank Chang (mfchang@ee.ucla.edu)

Date/Time:
Date(s) - Apr 15, 2020
2:00 pm - 4:00 pm

Location:
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