Efficient Machine Learning in the Age of Hardware Specialization

Speaker: Prof. Zhiru Zhang
Affiliation: Cornell University

Abstract: The growing complexity of machine learning (ML) models, the proliferation of edge devices, and the diminished benefits of technology scaling together place strong demands on continued improvements in performance and energy efficiency of computer hardware. In line with this trend, deep neural network (DNN) processing is shifting from general-purpose CPUs/GPUs to specialized architectures in both academic and commercial settings, and there has been a active body of research into hardware-friendly DNN optimization. Increasing specialization also motivates the deployment of new high-level design languages and ML-aided automation tools to implement hardware accelerators in a much more productive and agile manner.

This talk introduces our recent research results from three related projects that navigate the intersection between ML and hardware design:  (1) Channel gating, a dynamic, fine-grained, and trainable technique for DNN acceleration. Unlike static network pruning, channel gating exploits input-dependent dynamic sparsity at run time. This results in a significant reduction in compute cost with a minimal impact on accuracy; (2) HeteroCL, a new open-source programming infrastructure for accelerator-rich computing with decoupled algorithm and compute/data customization, and support for mixed declarative and imperative code; and (3) PRIMAL, an ML-based power inference framework that enables fast and accurate power estimation for reusable ASIC IPs. PRIMAL is orders of magnitude faster than the best commercial gate-level power analysis tool, with a marginal error.

Biography:  Zhiru Zhang is an Associate Professor in the School of ECE at Cornell University. His current research investigates new algorithms, design methodologies, and automation tools for heterogeneous computing. His research has been recognized by a Google Faculty Research Award (2018), the DAC Under-40 Innovators Award (2018), the Rising Professional Achievement Award from the UCLA Henry Samueli School of Engineering and Applied Science (2018), a DARPA Young Faculty Award (2015), and the IEEE CEDA Ernest S. Kuh Early Career Award (2015), an NSF CAREER Award (2015), the Ross Freeman Award for Technical Innovation from Xilinx (2012), and multiple best paper awards and nominations.  Prior to joining Cornell, he was a co-founder of AutoESL, a high-level synthesis start-up later acquired by Xilinx.

For more information, contact Prof. Puneet Gupta ()

Date/Time:
Date(s) - Nov 22, 2019
11:00 am - 12:30 pm

Location:
E-IV Tesla Room #53-125
420 Westwood Plaza - 5th Flr., Los Angeles CA 90095