| |
| |
|
2010 | 09 | 08 |
07 |
06 | 05
| 04 |
03 |before 2002|
|
| |
J.W. Park and B. Razavi,
"A Harmonic-Rejecting CMOS LNA for Broadband Radios," IEEE Journal of
Solid-State Circuits, vol. 48, pp.
1072-1084, Apr. 2013. |
| |
J.W. Jung and B. Razavi,
"A 25-Gb/s 5-mW CMOS CDR/Deserializer," IEEE Journal of
Solid-State Circuits, vol. 48, pp.
684-697, Mar. 2013. |
| |
A. Homayoun and B. Razavi,
"Analysis of Phase Noise in Phase/Frequency Detectors," IEEE Trans. Circuits and Systems - Part I, vol. 60, pp.
529-539, Mar. 2013. |
| |
C.K. Liang and B. Razavi,
"Transmitter Linearization by Beamforming," IEEE Journal of
Solid-State Circuits, vol. 46, pp.
1956-1969, Sep. 2011. |
| |
S. Ibrahim and B. Razavi,
"Low-Power CMOS Equalizer Design for 20-Gb/s Systems," IEEE Journal of Solid-State Circuits, vol. 46, pp.
1321-1336, June 2011. |
| |
B. Razavi,
"A 300-GHz Fundamental Oscillator in 65-nm CMOS Technology," IEEE Journal of
Solid-State Circuits, vol. 46, pp.
894-903, Apr. 2011. |
| |
M. Aboudina and B. Razavi,
"A New DAC Mismatch Shaping Technique for Sigma-Delta Modulators," IEEE Trans. Circuits and Systems - Part II, vol. 57, pp.
966-970, Dec. 2010. |
| |
B. Razavi,
"Cognitive Radio Design Challenges and Techniques," IEEE Journal of
Solid-State Circuits, vol. 45, pp.
1542-1553, Aug. 2010. |
| |
[Top]
A. Verma and B. Razavi,
"A 10-Bit 500-MS/s 55-mW CMOS ADC," IEEE Journal of
Solid-State Circuits, vol. 44, pp.
3039-3050, Nov. 2009. |
| |
B. D. Sahoo and B. Razavi,
"A 12-Bit 200-MHz CMOS ADC," IEEE Journal of
Solid-State Circuits, vol. 44, pp.
2366-2380, Sept. 2009. |
| |
B. Razavi,
"The Role of PLLs in Future Wireline Transmitters," IEEE Trans. Circuits and Systems - Part I,
vol. 56, pp. 1786-1793,
Aug. 2009.
|
| |
A. Parsa and B. Razavi,
"A New Transceiver Architecture for the 60-GHz Band," IEEE Journal of
Solid-State Circuits, vol. 44, pp.
751-762, Mar. 2009. |
| |
C.K. Liang and B. Razavi,
"Systematic Transistor and Inductor Modeling for
Millimeter-Wave Design," IEEE Journal of
Solid-State Circuits, vol. 44, pp.
450-457, Feb. 2009. |
| |
B. Razavi,
"Design of Millimeter-Wave CMOS Radios: A Tutorial," IEEE Trans. Circuits and Systems - Part I,
vol. 56, pp. 4-16,
Jan. 2009.
|
| |
[Top]
B. Razavi,
"A Millimeter-Wave Circuit Technique," IEEE Journal of
Solid-State Circuits, vol. 43, pp.
2090-2098, Sept. 2008. |
| |
B. Razavi,
"Gadgets Gab at 60 GHz," IEEE
Spectrum, vol. 45, pp.
46-58, Feb. 2008. |
| |
B. Razavi,
"A Millimeter-Wave CMOS Heterodyne Receiver with On-Chip LO
and Divider," IEEE Journal of
Solid-State Circuits, vol. 43, pp.
477-485, Feb. 2008. |
| |
B. Razavi,
"Heterodyne Phase Locking: A Technique for High-Speed
Frequency Division," IEEE Journal of
Solid-State Circuits, vol. 42, pp.
2877-2892, Dec. 2007. |
| |
[Top]
S. Gondi and B. Razavi, "Equalization and Clock and Data Recovery
Techniques for 10-Gb/s CMOS Serial Links," IEEE Journal of
Solid-State Circuits, vol. 42, pp. 1999-2011, Sept. 2007. |
| |
H. Rafati
and B. Razavi, "A Receiver Architecture for Dual-Antenna Systems,"
IEEE Journal of Solid-State Circuits, vol. 42, pp. 1291-1299,
June 2007. |
| |
B. Razavi, "A 60-GHz CMOS receiver front-end,"
IEEE Journal of Solid-State Circuits, vol. 41, pp. 17-22, Jan. 2006. |
| |
[Top]
B.
Razavi et al, "A UWB CMOS transceiver,"
IEEE Journal of Solid-State Circuits, vol. 40, pp. 2555-2562, Dec. 2005.
|
| |
[Top]
S. Galal and B. Razavi, "40-Gb/s amplifier and ESD protection circuit in
0.18um CMOS technology,"
IEEE Journal of Solid-State Circuits, vol. 39, pp. 2389-2396, Dec. 2004.
|
| |
[Top]
B. Razavi, "A study of injection locking and pulling in oscillators,"
IEEE Journal of Solid-State Circuits, vol. 39, pp. 1415-1424, Sep. 2004.
|
| |
J. Lee and B. Razavi, "Analysis and modeling of bang-bang clock and data recovery circuits,"
IEEE Journal of Solid-State Circuits, vol. 39, pp. 1571-1580, Sep. 2004.
|
| |
J. Lee and B. Razavi, "A 40-GHz frequency divider in 0.18um CMOS technology,"
IEEE Journal of Solid-State Circuits, vol. 39, pp. 594-601, Apr. 2004.
|
| |
J. Lee and B. Razavi, "A 40-Gb/s clock and data recovery circuit in 0.18um CMOS technology,"
IEEE Journal of Solid-State Circuits, vol. 38, pp. 2181-2190, Dec. 2003.
|
| |
[Top]
S. Galal and B. Razavi, "Broadband ESD Protection Circuits in CMOS Technology,"
IEEE Journal of Solid-State Circuits, vol. 38, pp. 2334-2340, Dec. 2003.
|
| |
S. Galal and B. Razavi,
"10-Gb/s Limiting Amplifier and Laser/Modulator Driver in 0.18um CMOS Technology,” IEEE Journal of Solid-State Circuits, vol. 38, pp. 2138-2146, Dec. 2003. |
| |
B. Razavi,
"RF CMOS Transceivers for Cellular Telephony," IEEE Comm. Mag., pp. 144-149, August 2003. |
| |
T. C. Lee and B. Razavi,
"A Stabilization Technique for Phase-Locked Frequency Synthesizers," IEEE Journal of Solid-State Circuits, vol. 38, pp.888-894, June 2003. |
| |
A. Zolfaghari and B. Razavi,
"A Low-Power 2.4-GHz Transmitter/Receiver CMOS IC," IEEE Journal of Solid-State Circuits, vol. 38, pp.176-183, Feb. 2003. |
| |
|
L. Der and B. Razavi, "A 2-GHz CMOS Image-Reject Receiver With LMS Calibration," IEEE Journal of Solid-State Circuits, vol. 38, pp.167-175, Feb. 2003. |
| |
|
J. Savoj and B. Razavi, "A 10-Gb/s CMOS Clock and Data Recovery Circuit With a Half-Rate Binary Phase/Frequency Detector," IEEE Journal of Solid-State Circuits, vol. 38, pp.13-21, Jan. 2003. |
| |
|
B. Razavi,
"Prospects of CMOS Technology for High-Speed Optical Communication Circuits," IEEE Journal of Solid-State Circuits, vol. 37, pp. 1135-1145, September 2002. |
| |
|
[Top]
B. Razavi,
"Challenges in the Design of High-Speed Clock and Data Recovery Circuits," IEEE Comm. Mag., vol. 40, pp. 94-101, August 2002.
|
| |
|
J. Savoj and B. Razavi,
"A 10-Gb/s CMOS Clock and Data Recovery Circuit with a Half-Rate Linear Phase Detector," IEEE Journal of Solid-State Circuits, vol. 36, pp. 761-768, May 2001 |
| |
|
[Top]
B. Razavi,
"A 5.2-GHz CMOS Receiver with 62-dB Image Rejection," IEEE Journal of Solid-State Circuits, vol. 36, pp. 810-815, May 2001. |
| |
|
A. Zolfaghari, A. Y. Chan, and B. Razavi,
"Stacked Inductors and 1-to-2 Transformers in CMOS Technology," IEEE Journal of Solid-State Circuits, vol. 36, pp. 620-628, April 2001. |
| |
|
S. B. Anand and B. Razavi, "A 2.5-Gb/s Clock Recovery Circuit for NRZ Data in 0.4-?m CMOS Technology," IEEE Journal of Solid-State Circuits, vol. 36, pp. 432-439, March 2001. |
| |
|
T. C. Lee and B. Razavi,
"A 4-Tap 125-MHz Mixed-Signal Echo Canceller for Gigabit Ethernet on Copper Wire," IEEE Journal of Solid-State Circuits, vol. 36, pp. 366-373, March 2001. |
| |
|
J. Savoj and B. Razavi,
"The First 10 Gbps CMOS Realizing LSI to One Chip for Data Communications," (in Japanese) Nikkei Microdevices, pp. 155-159, Sept. 2000.
|
| |
|
[Top]
C. Lam and B. Razavi,
"A 2.6-GHz/5.2-GHz Frequency Synthesizer in 0.4-?m CMOS Technology," IEEE Journal of Solid-State Circuits, vol. 35, pp. 788-794, May 2000. |
| |
|
Y. T. Wang and B. Razavi,
"An 8-bit 150-MHz CMOS A/D Converter," IEEE Journal of Solid-State Circuits, vol. 35, pp. 308-317, March 2000. |
| |
|
B. Razavi,
"A 2.4-GHz CMOS Receiver for IEEE 802.11 Wireless LAN Applications," IEEE Journal of Solid-State Circuits, vol. 34, pp. 1382-1385, Oct. 1999.
|
| |
|
[Top]
B. Razavi,
"A 900-MHz/1.8-GHz CMOS Transmitter for Dual-Band Applications," IEEE Journal of Solid- State Circuits, vol. 34, pp. 573-579, May 1999.
|
| |
|
B. Razavi,
"CMOS Technology Characterization for Analog and RF Design," IEEE Journal of Solid-State Circuits, vol. 34, pp. 268-276, March 1999.
|
| |
|
F. Herzel and B. Razavi,
"A Study of Oscillator Jitter Due to Supply and Substrate Noise," IEEE Transactions on Circuits and Systems, Part II, vol. 46, pp. 56-62, Jan. 1999. |
| |
|
S. Wu and B. Razavi,
"A 900-MHz/1.8-GHz CMOS Receiver for Dual-Band Applications," IEEE Journal of Solid-State Circuits, vol. 34, pp. 2178-2185, Dec. 1998. |
| |
|
B. Razavi,
"Recent Advances in RF Integrated Circuits," IEEE Circuits
and Devices Magazine, vol. 35, pp.
36-43, Dec. 1997. |
| |
|
B. Razavi, "Design Considerations for Direct Conversion Receivers,"
IEEE Transactions on Circuits and Systems, Part II, vol. 44, pp. 428-435, June 1997. |
| |
|
B. Razavi,
"A 2-GHz 1.6-mW Phase-Locked Loop," IEEE Journal of Solid-State Circuits, vol. 32, pp. 730- 735, April 1997.
|
| |
|
B. Razavi,
"Challenges in Portable RF Transceiver Design," IEEE Circuits
and Devices Magazine, vol. 12, pp.
12-25, Sep. 1996. |
| |
|
B. Razavi,
"A 2.5-Gb/sec 15-mW Clock Recovery Circuit," IEEE Journal of Solid-State Circuits, vol. 31, pp. 472-480, April 1996. |
| |
|
B. Razavi,
"A Study of Phase Noise in CMOS Oscillators," IEEE Journal of Solid-State Circuits, vol. 31, pp. 331-343, March 1996. |
| |
|
B. Razavi,
"A 200-MHz 15-mW BiCMOS Sample-and-Hold Amplifier with 3-V Supply," IEEE Journal of Solid-State Circuits, vol. 30, pp. 1326-1332, Dec. 1995. |
| |
|
B. Razavi,
"Design of a 100-MHz 10-mW 3-V Sample-and-Hold Amplifier in Digital Bipolar Technology,"
IEEE Journal of Solid-State Circuits, vol. 30, pp. 724-730, July 1995. |
| |
|
B. Razavi, and J. Sung,
"A 6-GHz 60-mW BiCMOS Phase-Locked Loop," IEEE Journal of Solid-State Circuits, vol. 29, pp. 1560-1565, Dec. 1994. |
| |
|
B. Razavi, K. F. Lee, and R. H. Yan,
"Design of High-Speed Low-Power Frequency Dividers and Phase- Locked Loops in Deep Submicron CMOS," IEEE Journal of Solid-State Circuits, vol. 30, pp. 101-109, Feb. 1995. |
| |
|
B. Razavi, R. H. Yan, and K. F. Lee, "Impact of Distributed Gate Resistance on the Performance of MOS Devices," IEEE Trans. Circuits and Systems - Part I, pp. 750-754, Nov. 1994.
|
| |
|
B. Razavi, Y. Ota, and R. G. Swartz,
"Design Techniques for Low-Voltage High-Speed Digital Bipolar Circuits," IEEE Journal of Solid-State Circuits, vol. 29, pp.332-339, March 1994. |
| |
|
B. Razavi and B. A. Wooley,"A 12-Bit 5-Msample/sec Two-Step CMOS A/D Converter," IEEE Journal of Solid-State Circuits, vol. 27, pp. 1667-1678, Dec. 1992. |
| |
|
B. Razavi and B. A. Wooley,"Design Techniques for High-Speed, High-Resolution Comparators," IEEE Journal of Solid-State Circuits, vol. 27, pp. 1916-1926, Dec. 1992. |
| |
|
[Top] |